From: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
To: Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>,
James Hogan <jhogan-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
Florian Fainelli
<f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
David Daney <david.daney-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>,
Kevin Cernekee <cernekee-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Jiaxun Yang <jiaxun.yang-nEvAom26CKtBDgjK7y7TUQ@public.gmane.org>,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
Tom Bogendoerfer
<tsbogend-I1c7kopa9pxLokYuJOExCg@public.gmane.org>,
Huacai Chen <chenhc-h23VmSynlr/QT0dZR+AlfA@public.gmane.org>
Subject: [PATCH 05/25] MIPS: Octeon: refactor swiotlb code
Date: Fri, 25 May 2018 11:20:51 +0200 [thread overview]
Message-ID: <20180525092111.18516-6-hch@lst.de> (raw)
In-Reply-To: <20180525092111.18516-1-hch-jcswGhMUV9g@public.gmane.org>
Share a common set of swiotlb operations, and to instead branch out in
__phys_to_dma/__dma_to_phys for the PCI vs non-PCI case. Also use const
structures for the PCI methods so that attackers can't use them as
exploit vectors.
Signed-off-by: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
---
arch/mips/cavium-octeon/dma-octeon.c | 169 ++++++++----------
.../asm/mach-cavium-octeon/dma-coherence.h | 2 -
arch/mips/pci/pci-octeon.c | 2 -
3 files changed, 70 insertions(+), 103 deletions(-)
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
index e5d00c79bd26..1e68636c9137 100644
--- a/arch/mips/cavium-octeon/dma-octeon.c
+++ b/arch/mips/cavium-octeon/dma-octeon.c
@@ -23,10 +23,16 @@
#include <asm/octeon/octeon.h>
#ifdef CONFIG_PCI
+#include <linux/pci.h>
#include <asm/octeon/pci-octeon.h>
#include <asm/octeon/cvmx-npi-defs.h>
#include <asm/octeon/cvmx-pci-defs.h>
+struct octeon_dma_map_ops {
+ dma_addr_t (*phys_to_dma)(struct device *dev, phys_addr_t paddr);
+ phys_addr_t (*dma_to_phys)(struct device *dev, dma_addr_t daddr);
+};
+
static dma_addr_t octeon_hole_phys_to_dma(phys_addr_t paddr)
{
if (paddr >= CVMX_PCIE_BAR1_PHYS_BASE && paddr < (CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_PHYS_SIZE))
@@ -43,6 +49,11 @@ static phys_addr_t octeon_hole_dma_to_phys(dma_addr_t daddr)
return daddr;
}
+static const struct octeon_dma_map_ops octeon_gen2_ops = {
+ .phys_to_dma = octeon_hole_phys_to_dma,
+ .dma_to_phys = octeon_hole_dma_to_phys,
+};
+
static dma_addr_t octeon_gen1_phys_to_dma(struct device *dev, phys_addr_t paddr)
{
if (paddr >= 0x410000000ull && paddr < 0x420000000ull)
@@ -60,15 +71,10 @@ static phys_addr_t octeon_gen1_dma_to_phys(struct device *dev, dma_addr_t daddr)
return daddr;
}
-static dma_addr_t octeon_gen2_phys_to_dma(struct device *dev, phys_addr_t paddr)
-{
- return octeon_hole_phys_to_dma(paddr);
-}
-
-static phys_addr_t octeon_gen2_dma_to_phys(struct device *dev, dma_addr_t daddr)
-{
- return octeon_hole_dma_to_phys(daddr);
-}
+static const struct octeon_dma_map_ops octeon_gen1_ops = {
+ .phys_to_dma = octeon_gen1_phys_to_dma,
+ .dma_to_phys = octeon_gen1_dma_to_phys,
+};
static dma_addr_t octeon_big_phys_to_dma(struct device *dev, phys_addr_t paddr)
{
@@ -92,6 +98,11 @@ static phys_addr_t octeon_big_dma_to_phys(struct device *dev, dma_addr_t daddr)
return daddr;
}
+static const struct octeon_dma_map_ops octeon_big_ops = {
+ .phys_to_dma = octeon_big_phys_to_dma,
+ .dma_to_phys = octeon_big_dma_to_phys,
+};
+
static dma_addr_t octeon_small_phys_to_dma(struct device *dev,
phys_addr_t paddr)
{
@@ -120,6 +131,32 @@ static phys_addr_t octeon_small_dma_to_phys(struct device *dev,
return daddr;
}
+static const struct octeon_dma_map_ops octeon_small_ops = {
+ .phys_to_dma = octeon_small_phys_to_dma,
+ .dma_to_phys = octeon_small_dma_to_phys,
+};
+
+static const struct octeon_dma_map_ops *octeon_pci_dma_ops;
+
+void __init octeon_pci_dma_init(void)
+{
+ switch (octeon_dma_bar_type) {
+ case OCTEON_DMA_BAR_TYPE_PCIE2:
+ octeon_pci_dma_ops = &octeon_gen2_ops;
+ break;
+ case OCTEON_DMA_BAR_TYPE_PCIE:
+ octeon_pci_dma_ops = &octeon_gen1_ops;
+ break;
+ case OCTEON_DMA_BAR_TYPE_BIG:
+ octeon_pci_dma_ops = &octeon_big_ops;
+ break;
+ case OCTEON_DMA_BAR_TYPE_SMALL:
+ octeon_pci_dma_ops = &octeon_small_ops;
+ break;
+ default:
+ BUG();
+ }
+}
#endif /* CONFIG_PCI */
static dma_addr_t octeon_dma_map_page(struct device *dev, struct page *page,
@@ -165,57 +202,37 @@ static void *octeon_dma_alloc_coherent(struct device *dev, size_t size,
return ret;
}
-static dma_addr_t octeon_unity_phys_to_dma(struct device *dev, phys_addr_t paddr)
-{
- return paddr;
-}
-
-static phys_addr_t octeon_unity_dma_to_phys(struct device *dev, dma_addr_t daddr)
-{
- return daddr;
-}
-
-struct octeon_dma_map_ops {
- const struct dma_map_ops dma_map_ops;
- dma_addr_t (*phys_to_dma)(struct device *dev, phys_addr_t paddr);
- phys_addr_t (*dma_to_phys)(struct device *dev, dma_addr_t daddr);
-};
-
dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
{
- struct octeon_dma_map_ops *ops = container_of(get_dma_ops(dev),
- struct octeon_dma_map_ops,
- dma_map_ops);
-
- return ops->phys_to_dma(dev, paddr);
+#ifdef CONFIG_PCI
+ if (dev && dev_is_pci(dev))
+ return octeon_pci_dma_ops->phys_to_dma(dev, paddr);
+#endif
+ return paddr;
}
phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr)
{
- struct octeon_dma_map_ops *ops = container_of(get_dma_ops(dev),
- struct octeon_dma_map_ops,
- dma_map_ops);
-
- return ops->dma_to_phys(dev, daddr);
+#ifdef CONFIG_PCI
+ if (dev && dev_is_pci(dev))
+ return octeon_pci_dma_ops->dma_to_phys(dev, daddr);
+#endif
+ return daddr;
}
-static struct octeon_dma_map_ops octeon_linear_dma_map_ops = {
- .dma_map_ops = {
- .alloc = octeon_dma_alloc_coherent,
- .free = swiotlb_free,
- .map_page = octeon_dma_map_page,
- .unmap_page = swiotlb_unmap_page,
- .map_sg = octeon_dma_map_sg,
- .unmap_sg = swiotlb_unmap_sg_attrs,
- .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
- .sync_single_for_device = octeon_dma_sync_single_for_device,
- .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
- .sync_sg_for_device = octeon_dma_sync_sg_for_device,
- .mapping_error = swiotlb_dma_mapping_error,
- .dma_supported = swiotlb_dma_supported
- },
- .phys_to_dma = octeon_unity_phys_to_dma,
- .dma_to_phys = octeon_unity_dma_to_phys
+static const struct dma_map_ops octeon_swiotlb_ops = {
+ .alloc = octeon_dma_alloc_coherent,
+ .free = swiotlb_free,
+ .map_page = octeon_dma_map_page,
+ .unmap_page = swiotlb_unmap_page,
+ .map_sg = octeon_dma_map_sg,
+ .unmap_sg = swiotlb_unmap_sg_attrs,
+ .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
+ .sync_single_for_device = octeon_dma_sync_single_for_device,
+ .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
+ .sync_sg_for_device = octeon_dma_sync_sg_for_device,
+ .mapping_error = swiotlb_dma_mapping_error,
+ .dma_supported = swiotlb_dma_supported
};
char *octeon_swiotlb;
@@ -281,51 +298,5 @@ void __init plat_swiotlb_setup(void)
if (swiotlb_init_with_tbl(octeon_swiotlb, swiotlb_nslabs, 1) == -ENOMEM)
panic("Cannot allocate SWIOTLB buffer");
- mips_dma_map_ops = &octeon_linear_dma_map_ops.dma_map_ops;
-}
-
-#ifdef CONFIG_PCI
-static struct octeon_dma_map_ops _octeon_pci_dma_map_ops = {
- .dma_map_ops = {
- .alloc = octeon_dma_alloc_coherent,
- .free = swiotlb_free,
- .map_page = octeon_dma_map_page,
- .unmap_page = swiotlb_unmap_page,
- .map_sg = octeon_dma_map_sg,
- .unmap_sg = swiotlb_unmap_sg_attrs,
- .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
- .sync_single_for_device = octeon_dma_sync_single_for_device,
- .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
- .sync_sg_for_device = octeon_dma_sync_sg_for_device,
- .mapping_error = swiotlb_dma_mapping_error,
- .dma_supported = swiotlb_dma_supported
- },
-};
-
-const struct dma_map_ops *octeon_pci_dma_map_ops;
-
-void __init octeon_pci_dma_init(void)
-{
- switch (octeon_dma_bar_type) {
- case OCTEON_DMA_BAR_TYPE_PCIE2:
- _octeon_pci_dma_map_ops.phys_to_dma = octeon_gen2_phys_to_dma;
- _octeon_pci_dma_map_ops.dma_to_phys = octeon_gen2_dma_to_phys;
- break;
- case OCTEON_DMA_BAR_TYPE_PCIE:
- _octeon_pci_dma_map_ops.phys_to_dma = octeon_gen1_phys_to_dma;
- _octeon_pci_dma_map_ops.dma_to_phys = octeon_gen1_dma_to_phys;
- break;
- case OCTEON_DMA_BAR_TYPE_BIG:
- _octeon_pci_dma_map_ops.phys_to_dma = octeon_big_phys_to_dma;
- _octeon_pci_dma_map_ops.dma_to_phys = octeon_big_dma_to_phys;
- break;
- case OCTEON_DMA_BAR_TYPE_SMALL:
- _octeon_pci_dma_map_ops.phys_to_dma = octeon_small_phys_to_dma;
- _octeon_pci_dma_map_ops.dma_to_phys = octeon_small_dma_to_phys;
- break;
- default:
- BUG();
- }
- octeon_pci_dma_map_ops = &_octeon_pci_dma_map_ops.dma_map_ops;
+ mips_dma_map_ops = &octeon_swiotlb_ops;
}
-#endif /* CONFIG_PCI */
diff --git a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
index 6eb1ee548b11..c5cdeea495f8 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h
@@ -72,8 +72,6 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr);
phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr);
-struct dma_map_ops;
-extern const struct dma_map_ops *octeon_pci_dma_map_ops;
extern char *octeon_swiotlb;
#endif /* __ASM_MACH_CAVIUM_OCTEON_DMA_COHERENCE_H */
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index 3e92a06fa772..a20697df3539 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -166,8 +166,6 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig);
}
- dev->dev.dma_ops = octeon_pci_dma_map_ops;
-
return 0;
}
--
2.17.0
next prev parent reply other threads:[~2018-05-25 9:20 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-25 9:20 [RFC] switch mips to use the generic dma map ops Christoph Hellwig
[not found] ` <20180525092111.18516-1-hch-jcswGhMUV9g@public.gmane.org>
2018-05-25 9:20 ` [PATCH 01/25] MIPS: remove a dead ifdef from mach-ath25/dma-coherence.h Christoph Hellwig
2018-05-25 9:20 ` [PATCH 02/25] MIPS: simplify CONFIG_DMA_NONCOHERENT ifdefs Christoph Hellwig
2018-05-25 9:20 ` [PATCH 03/25] MIPS: remove CONFIG_DMA_COHERENT Christoph Hellwig
2018-05-25 9:20 ` [PATCH 04/25] MIPS: Octeon: unexport __phys_to_dma and __dma_to_phys Christoph Hellwig
2018-05-25 9:20 ` Christoph Hellwig [this message]
[not found] ` <20180525092111.18516-6-hch-jcswGhMUV9g@public.gmane.org>
2018-05-30 23:25 ` [PATCH 05/25] MIPS: Octeon: refactor swiotlb code Paul Burton
2018-05-31 16:38 ` Christoph Hellwig
2018-05-25 9:20 ` [PATCH 06/25] MIPS: loongson: remove loongson_dma_supported Christoph Hellwig
[not found] ` <20180525092111.18516-7-hch-jcswGhMUV9g@public.gmane.org>
2018-05-31 23:12 ` Paul Burton
2018-05-25 9:20 ` [PATCH 07/25] MIPS: consolidate the swiotlb implementations Christoph Hellwig
2018-05-25 9:20 ` [PATCH 08/25] MIPS: remove the mips_dma_map_ops indirection Christoph Hellwig
2018-05-25 9:20 ` [PATCH 09/25] MIPS: make the default mips dma implementation optional Christoph Hellwig
2018-05-25 9:20 ` [PATCH 10/25] MIPS: Octeon: remove mips dma-default stubs Christoph Hellwig
2018-05-25 9:20 ` [PATCH 11/25] MIPS: Octeon: move swiotlb declarations out of dma-coherence.h Christoph Hellwig
2018-05-25 9:20 ` [PATCH 12/25] MIPS: loongson: untangle dma implementations Christoph Hellwig
[not found] ` <20180525092111.18516-13-hch-jcswGhMUV9g@public.gmane.org>
2018-07-11 12:46 ` Maciej W. Rozycki
[not found] ` <alpine.DEB.2.00.1807110407510.30992-AURtyoD2VtPP6B53oEZunQ@public.gmane.org>
2018-07-11 12:57 ` Christoph Hellwig
[not found] ` <20180711125736.GA19191-jcswGhMUV9g@public.gmane.org>
2018-07-11 13:21 ` Maciej W. Rozycki
2018-05-25 9:20 ` [PATCH 13/25] MIPS: loongson: remove loongson-3 handling from dma-coherence.h Christoph Hellwig
2018-05-25 9:21 ` [PATCH 14/25] MIPS: use dma_direct_ops for coherent I/O Christoph Hellwig
2018-05-25 9:21 ` [PATCH 15/25] MIPS: IP27: use dma_direct_ops Christoph Hellwig
2018-05-25 9:21 ` [PATCH 16/25] MIPS: move coherentio setup to setup.c Christoph Hellwig
2018-05-25 9:21 ` [PATCH 17/25] MIPS: use generic dma noncoherent ops for simple noncoherent platforms Christoph Hellwig
2018-05-25 9:21 ` [PATCH 18/25] MIPS: loongson64: use generic dma noncoherent ops Christoph Hellwig
2018-05-25 9:21 ` [PATCH 19/25] MIPS: IP32: " Christoph Hellwig
2018-05-25 9:21 ` [PATCH 20/25] MIPS: ath25: " Christoph Hellwig
2018-05-25 9:21 ` [PATCH 21/25] MIPS: jazz: split dma mapping operations from dma-default Christoph Hellwig
2018-05-25 9:21 ` [PATCH 22/25] dma-noncoherent: add a arch_sync_dma_for_cpu_all hook Christoph Hellwig
2018-05-25 9:21 ` [PATCH 23/25] MIPS: bmips: use generic dma noncoherent ops Christoph Hellwig
2018-05-25 9:21 ` [PATCH 24/25] MIPS: remove the old dma-default implementation Christoph Hellwig
2018-05-25 9:21 ` [PATCH 25/25] MIPS: remove unneeded includes from dma-mapping.h Christoph Hellwig
-- strict thread matches above, loose matches on Subject: below --
2018-06-15 11:08 switch mips to use the generic dma map ops v2 Christoph Hellwig
[not found] ` <20180615110854.19253-1-hch-jcswGhMUV9g@public.gmane.org>
2018-06-15 11:08 ` [PATCH 05/25] MIPS: Octeon: refactor swiotlb code Christoph Hellwig
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