From: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
To: x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
Date: Sun, 14 Oct 2018 09:52:08 +0200 [thread overview]
Message-ID: <20181014075208.2715-1-hch@lst.de> (raw)
We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.
Before Linux 4.18 we papers over this fact because the networking code,
the scsi layer and some random block drivers implenented their own
bounce buffering scheme.
Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/x86/kernel/pci-swiotlb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
int __init pci_swiotlb_detect_4gb(void)
{
/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
swiotlb = 1;
-#endif
/*
* If SME is active then swiotlb will be set to 1 so that bounce
--
2.19.1
next reply other threads:[~2018-10-14 7:52 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-14 7:52 Christoph Hellwig [this message]
[not found] ` <20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org>
2018-10-14 8:13 ` [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Thomas Gleixner
[not found] ` <alpine.DEB.2.21.1810141012510.1438-ecDvlHI5BZPZikZi3RtOZ1XZhhPuCNm+@public.gmane.org>
2018-10-14 8:14 ` Christoph Hellwig
[not found] ` <20181014081443.GA17889-jcswGhMUV9g@public.gmane.org>
2018-10-14 8:57 ` Thomas Gleixner
[not found] ` <alpine.DEB.2.21.1810141055440.1438-ecDvlHI5BZPZikZi3RtOZ1XZhhPuCNm+@public.gmane.org>
2018-10-14 9:04 ` Ingo Molnar
2018-10-14 12:49 ` tedheadster
2018-10-15 18:52 ` Konrad Rzeszutek Wilk
2018-10-16 13:11 ` tedheadster
[not found] ` <CAP8WD_Zj5aMcTCVtV-hot3zLNfNuMzHyeogm0Lqb=+XZ1LdkKw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-17 10:16 ` Thomas Gleixner
2018-10-17 16:33 ` Christoph Hellwig
[not found] ` <20181017163351.GA23719-jcswGhMUV9g@public.gmane.org>
2018-10-17 17:41 ` tedheadster
[not found] ` <CAP8WD_boL-DxEXxa-ci382Ff8yTdMS9T+sy2Y0-LEX-WPc8L_g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-18 12:51 ` Christoph Hellwig
[not found] ` <20181018125116.GA24676-jcswGhMUV9g@public.gmane.org>
2018-10-19 1:00 ` tedheadster
[not found] ` <CAP8WD_Z2XvLsqimSnODwr5gj6GRuzh4SMKN56n6Y0JzufG=E8A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-19 5:51 ` Ingo Molnar
2018-10-18 6:12 ` Ingo Molnar
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