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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id q19sm45324010wra.89.2019.10.15.09.29.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Oct 2019 09:29:47 -0700 (PDT) From: Thierry Reding To: Arnd Bergmann Subject: [RFC 0/3] Introduce memory controller mini-framework Date: Tue, 15 Oct 2019 18:29:42 +0200 Message-Id: <20191015162945.1203736-1-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 MIME-Version: 1.0 Cc: Will Deacon , Jonathan Hunter , iommu@lists.linux-foundation.org, linux-tegra@vger.kernel.org, Robin Murphy , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: iommu-bounces@lists.linux-foundation.org Errors-To: iommu-bounces@lists.linux-foundation.org From: Thierry Reding Hi, this series proposes the introduction of a mini-framework for memory controllers. The primary use-case for this right now is to allow for drivers that depend on the memory controller to defer probe until the memory controller has been successfully registered. One example where this is needed is on Tegra186 and later SoCs where the memory controller needs to program some registers to associate a stream ID with memory clients. This requires that the IOMMU driver defers probe until the memory controller has been registered. This is achieved by providing a trivial memory controller registry that can be queried. I haven't written up a full device tree binding for this, but if people think this is a reasonable proposal, I can flesh things out. Currently I use something along these lines on Tegra186: mc: memory-controller@2c00000 { ... #memory-controller-cells = <0>; ... }; iommu@12000000 { ... memory-controllers = <&mc>; ... }; Thierry Thierry Reding (3): memory: Introduce memory controller mini-framework memory: tegra186: Register as memory controller iommu: arm-smmu: Get reference to memory controller drivers/iommu/arm-smmu.c | 12 ++++ drivers/iommu/arm-smmu.h | 2 + drivers/memory/Makefile | 1 + drivers/memory/core.c | 99 +++++++++++++++++++++++++++++++ drivers/memory/tegra/tegra186.c | 8 ++- include/linux/memory-controller.h | 25 ++++++++ 6 files changed, 146 insertions(+), 1 deletion(-) create mode 100644 drivers/memory/core.c create mode 100644 include/linux/memory-controller.h -- 2.23.0 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu