From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DB9FC43331 for ; Wed, 13 Nov 2019 07:03:21 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 292452196E for ; Wed, 13 Nov 2019 07:03:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 292452196E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lst.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=iommu-bounces@lists.linux-foundation.org Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id B4025C77; Wed, 13 Nov 2019 07:03:20 +0000 (UTC) Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id 61519C59 for ; Wed, 13 Nov 2019 07:03:19 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from verein.lst.de (verein.lst.de [213.95.11.211]) by smtp1.linuxfoundation.org (Postfix) with ESMTPS id BF85ECF for ; Wed, 13 Nov 2019 07:03:18 +0000 (UTC) Received: by verein.lst.de (Postfix, from userid 2407) id 3AA5868C4E; Wed, 13 Nov 2019 08:03:13 +0100 (CET) Date: Wed, 13 Nov 2019 08:03:12 +0100 From: Christoph Hellwig To: Lu Baolu Subject: Re: [PATCH v5 02/10] iommu/vt-d: Use per-device dma_ops Message-ID: <20191113070312.GA2735@lst.de> References: <20190725031717.32317-1-baolu.lu@linux.intel.com> <20190725031717.32317-3-baolu.lu@linux.intel.com> <20190725054413.GC24527@lst.de> <20190725114348.GA30957@lst.de> <20191112071640.GA3343@lst.de> <0885617e-8390-6d18-987f-40d49f9f563e@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <0885617e-8390-6d18-987f-40d49f9f563e@linux.intel.com> User-Agent: Mutt/1.5.17 (2007-11-01) Cc: alan.cox@intel.com, Christoph Hellwig , Stefano Stabellini , ashok.raj@intel.com, Jonathan Corbet , pengfei.xu@intel.com, Ingo Molnar , David Woodhouse , kevin.tian@intel.com, Konrad Rzeszutek Wilk , Steven Rostedt , Bjorn Helgaas , Boris Ostrovsky , mika.westerberg@linux.intel.com, Juergen Gross , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, jacob.jun.pan@intel.com, Robin Murphy X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: iommu-bounces@lists.linux-foundation.org Errors-To: iommu-bounces@lists.linux-foundation.org On Wed, Nov 13, 2019 at 10:50:27AM +0800, Lu Baolu wrote: > Currently, this is a block issue for using per-device dma ops in Intel > IOMMU driver. Hence block this driver from using the generic iommu dma > ops. That is in fact the reason why I bring it up :) > I'd like to align Intel IOMMU driver with other vendors. Use iommu dma > ops for devices which have been selected to go through iommu. And use > direct dma ops if selected to by pass. > > One concern of this propose is that for devices with limited address > capability, shall we force it to use iommu or alternatively use swiotlb > if user decides to let it by pass iommu. > > I understand that using swiotlb will cause some overhead due to the > bounced buffer, but Intel IOMMU is default on hence any users who use a > default kernel won't suffer this. We only need to document this so that > users understand this overhead when they decide to let such devices by > pass iommu. This is common to all vendor iommu drivers as far as I can > see. Indeed. And one idea would be to lift the code in the powerpc dma_iommu_ops that check a flag and use the direct ops to the generic dma code and a flag in struct device. We can then switch the intel iommu ops (and AMD Gart) over to it. _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu