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Thu, 13 Feb 2020 08:52:06 -0800 (PST) Received: from localhost.localdomain ([2001:171b:2276:930:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id y6sm3484807wrl.17.2020.02.13.08.52.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 08:52:05 -0800 (PST) From: Jean-Philippe Brucker To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, joro@8bytes.org, baolu.lu@linux.intel.com, linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, iommu@lists.linux-foundation.org Subject: [PATCH 02/11] PCI: Add ats_supported host bridge flag Date: Thu, 13 Feb 2020 17:50:40 +0100 Message-Id: <20200213165049.508908-3-jean-philippe@linaro.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200213165049.508908-1-jean-philippe@linaro.org> References: <20200213165049.508908-1-jean-philippe@linaro.org> MIME-Version: 1.0 Cc: mark.rutland@arm.com, frowand.list@gmail.com, corbet@lwn.net, liviu.dudau@arm.com, sudeep.holla@arm.com, rjw@rjwysocki.net, guohanjun@huawei.com, amurray@thegoodpenguin.co.uk, robin.murphy@arm.com, dwmw2@infradead.org, lenb@kernel.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Each vendor has their own way of describing whether a host bridge supports ATS. The Intel and AMD ACPI tables selectively enable or disable ATS per device or sub-tree, while Arm has a single bit for each host bridge. For those that need it, add an ats_supported bit to the host bridge structure. Signed-off-by: Jean-Philippe Brucker --- drivers/pci/probe.c | 7 +++++++ include/linux/pci.h | 1 + 2 files changed, 8 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 512cb4312ddd..75c0a25af44e 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -598,6 +598,13 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge) bridge->native_shpc_hotplug = 1; bridge->native_pme = 1; bridge->native_ltr = 1; + + /* + * Some systems may disable ATS at the host bridge (ACPI IORT, + * device-tree), other filter it with a smaller granularity (ACPI DMAR + * and IVRS). + */ + bridge->ats_supported = 1; } struct pci_host_bridge *pci_alloc_host_bridge(size_t priv) diff --git a/include/linux/pci.h b/include/linux/pci.h index 3840a541a9de..9fe2e84d74d7 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -511,6 +511,7 @@ struct pci_host_bridge { unsigned int native_pme:1; /* OS may use PCIe PME */ unsigned int native_ltr:1; /* OS may use PCIe LTR */ unsigned int preserve_config:1; /* Preserve FW resource setup */ + unsigned int ats_supported:1; /* Resource alignment requirements */ resource_size_t (*align_resource)(struct pci_dev *dev, -- 2.25.0 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu