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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id d7sm830750pfa.106.2020.03.16.14.42.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 16 Mar 2020 14:42:33 -0700 (PDT) Date: Mon, 16 Mar 2020 14:42:49 -0700 From: Nicolin Chen To: Robin Murphy Subject: Re: [RFC][PATCH] dma-mapping: align default segment_boundary_mask with dma_mask Message-ID: <20200316214248.GB18970@Asurada-Nvidia.nvidia.com> References: <20200314000007.13778-1-nicoleotsuka@gmail.com> <20200316124652.GA17386@lst.de> <09b61b1d-800a-ff18-71f6-57a5f569ea3c@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <09b61b1d-800a-ff18-71f6-57a5f569ea3c@arm.com> User-Agent: Mutt/1.9.4 (2018-02-28) Cc: linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Christoph Hellwig X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Mon, Mar 16, 2020 at 01:16:16PM +0000, Robin Murphy wrote: > On 2020-03-16 12:46 pm, Christoph Hellwig wrote: > > On Mon, Mar 16, 2020 at 12:12:08PM +0000, Robin Murphy wrote: > > > On 2020-03-14 12:00 am, Nicolin Chen wrote: > > > > More and more drivers set dma_masks above DMA_BIT_MAKS(32) while > > > > only a handful of drivers call dma_set_seg_boundary(). This means > > > > that most drivers have a 4GB segmention boundary because DMA API > > > > returns DMA_BIT_MAKS(32) as a default value, though they might be > > > > able to handle things above 32-bit. > > > > > > Don't assume the boundary mask and the DMA mask are related. There do exist > > > devices which can DMA to a 64-bit address space in general, but due to > > > descriptor formats/hardware design/whatever still require any single > > > transfer not to cross some smaller boundary. XHCI is 64-bit yet requires > > > most things not to cross a 64KB boundary. EHCI's 64-bit mode is an example > > > of the 4GB boundary (not the best example, admittedly, but it undeniably > > > exists). > > > > Yes, which is what the boundary is for. But why would we default to > > something restrictive by default even if the driver didn't ask for it? > > I've always assumed it was for the same reason as the 64KB segment length, > i.e. it was sufficiently common as an actual restriction, but still "good > enough" for everyone else. I remember digging up all the history to > understand what these were about back when I implemented the map_sg stuff, > and from that I'd imagine the actual values are somewhat biased towards SCSI > HBAs, since they originated in the block and SCSI layers. Yea, I did the same: commit d22a6966b8029913fac37d078ab2403898d94c63 Author: FUJITA Tomonori Date: Mon Feb 4 22:28:13 2008 -0800 iommu sg merging: add accessors for segment_boundary_mask in device_dma_parameters() This adds new accessors for segment_boundary_mask in device_dma_parameters structure in the same way I did for max_segment_size. So we can easily change where to place struct device_dma_parameters in the future. dma_get_segment boundary returns 0xffffffff if dma_parms in struct device isn't set up properly. 0xffffffff is the default value used in the block layer and the scsi mid layer. Signed-off-by: FUJITA Tomonori Cc: James Bottomley Cc: Jens Axboe Cc: Greg KH Cc: Jeff Garzik Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu