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b=iGNt+0y7StNFJ9c9x/8lhyA1PLQ3tDd5nq7Fn5oEDUNEOPIscwRtQV/Q58IL6ho13bOM1k rSQVjWDxpdi0qjQULSPv+1YznEFUswkVlxXXnj9DLMg1LvPJPFPXBvLzSRqiCxEQN/B+04 oB+IoWuDtvsUdxzvgK3cdkIaIVVvRlI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-201-tUUKnrpqMMK2P6J70y8zqg-1; Fri, 20 Mar 2020 12:19:59 -0400 X-MC-Unique: tUUKnrpqMMK2P6J70y8zqg-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0D063107AD65; Fri, 20 Mar 2020 16:19:51 +0000 (UTC) Received: from laptop.redhat.com (ovpn-113-142.ams2.redhat.com [10.36.113.142]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0D68660C63; Fri, 20 Mar 2020 16:19:36 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, joro@8bytes.org, alex.williamson@redhat.com, jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com, jean-philippe.brucker@arm.com, will.deacon@arm.com, robin.murphy@arm.com Subject: [PATCH v10 03/11] vfio: VFIO_IOMMU_SET_MSI_BINDING Date: Fri, 20 Mar 2020 17:19:03 +0100 Message-Id: <20200320161911.27494-4-eric.auger@redhat.com> In-Reply-To: <20200320161911.27494-1-eric.auger@redhat.com> References: <20200320161911.27494-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 Cc: marc.zyngier@arm.com, peter.maydell@linaro.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" This patch adds the VFIO_IOMMU_SET_MSI_BINDING ioctl which aim to (un)register the guest MSI binding to the host. This latter then can use those stage 1 bindings to build a nested stage binding targeting the physical MSIs. Signed-off-by: Eric Auger --- v8 -> v9: - merge VFIO_IOMMU_BIND_MSI/VFIO_IOMMU_UNBIND_MSI into a single VFIO_IOMMU_SET_MSI_BINDING ioctl - ioctl id changed v6 -> v7: - removed the dev arg v3 -> v4: - add UNBIND - unwind on BIND error v2 -> v3: - adapt to new proto of bind_guest_msi - directly use vfio_iommu_for_each_dev v1 -> v2: - s/vfio_iommu_type1_guest_msi_binding/vfio_iommu_type1_bind_guest_msi --- drivers/vfio/vfio_iommu_type1.c | 55 +++++++++++++++++++++++++++++++++ include/uapi/linux/vfio.h | 20 ++++++++++++ 2 files changed, 75 insertions(+) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index 04c6625098bb..17ba63de1494 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2246,6 +2246,42 @@ static int vfio_cache_inv_fn(struct device *dev, void *data) return iommu_cache_invalidate(dc->domain, dev, &ustruct->info); } +static int +vfio_bind_msi(struct vfio_iommu *iommu, + dma_addr_t giova, phys_addr_t gpa, size_t size) +{ + struct vfio_domain *d; + int ret = 0; + + mutex_lock(&iommu->lock); + + list_for_each_entry(d, &iommu->domain_list, next) { + ret = iommu_bind_guest_msi(d->domain, giova, gpa, size); + if (ret) + goto unwind; + } + goto unlock; +unwind: + list_for_each_entry_continue_reverse(d, &iommu->domain_list, next) { + iommu_unbind_guest_msi(d->domain, giova); + } +unlock: + mutex_unlock(&iommu->lock); + return ret; +} + +static void +vfio_unbind_msi(struct vfio_iommu *iommu, dma_addr_t giova) +{ + struct vfio_domain *d; + + mutex_lock(&iommu->lock); + list_for_each_entry(d, &iommu->domain_list, next) { + iommu_unbind_guest_msi(d->domain, giova); + } + mutex_unlock(&iommu->lock); +} + static long vfio_iommu_type1_ioctl(void *iommu_data, unsigned int cmd, unsigned long arg) { @@ -2387,6 +2423,25 @@ static long vfio_iommu_type1_ioctl(void *iommu_data, &ustruct); mutex_unlock(&iommu->lock); return ret; + } else if (cmd == VFIO_IOMMU_SET_MSI_BINDING) { + struct vfio_iommu_type1_set_msi_binding ustruct; + + minsz = offsetofend(struct vfio_iommu_type1_set_msi_binding, + size); + + if (copy_from_user(&ustruct, (void __user *)arg, minsz)) + return -EFAULT; + + if (ustruct.argsz < minsz) + return -EINVAL; + + if (ustruct.flags == VFIO_IOMMU_UNBIND_MSI) + vfio_unbind_msi(iommu, ustruct.iova); + else if (ustruct.flags == VFIO_IOMMU_BIND_MSI) + return vfio_bind_msi(iommu, ustruct.iova, ustruct.gpa, + ustruct.size); + else + return -EINVAL; } return -ENOTTY; diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 98212c1711e7..9f2429eb1958 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -826,6 +826,26 @@ struct vfio_iommu_type1_cache_invalidate { }; #define VFIO_IOMMU_CACHE_INVALIDATE _IO(VFIO_TYPE, VFIO_BASE + 23) +/** + * VFIO_IOMMU_SET_MSI_BINDING - _IOWR(VFIO_TYPE, VFIO_BASE + 24, + * struct vfio_iommu_type1_set_msi_binding) + * + * Pass a stage 1 MSI doorbell mapping to the host so that this + * latter can build a nested stage2 mapping. Or conversely tear + * down a previously bound stage 1 MSI binding. + */ +struct vfio_iommu_type1_set_msi_binding { + __u32 argsz; + __u32 flags; +#define VFIO_IOMMU_BIND_MSI (1 << 0) +#define VFIO_IOMMU_UNBIND_MSI (1 << 1) + __u64 iova; /* MSI guest IOVA */ + /* Fields below are used on BIND */ + __u64 gpa; /* MSI guest physical address */ + __u64 size; /* size of stage1 mapping (bytes) */ +}; +#define VFIO_IOMMU_SET_MSI_BINDING _IO(VFIO_TYPE, VFIO_BASE + 24) + /* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */ /* -- 2.20.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu