From: Fenghua Yu <fenghua.yu@intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Ravi V Shankar <ravi.v.shankar@intel.com>,
Tony Luck <tony.luck@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Ashok Raj <ashok.raj@intel.com>, x86 <x86@kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Dave Hansen <dave.hansen@intel.com>,
iommu@lists.linux-foundation.org, Ingo Molnar <mingo@redhat.com>,
Borislav Petkov <bp@alien8.de>,
Jacob Jun Pan <jacob.jun.pan@intel.com>,
H Peter Anvin <hpa@zytor.com>,
David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH 5/7] x86/mmu: Allocate/free PASID
Date: Tue, 28 Apr 2020 13:57:19 -0700 [thread overview]
Message-ID: <20200428205718.GG242333@romley-ivt3.sc.intel.com> (raw)
In-Reply-To: <87pnbus3du.fsf@nanos.tec.linutronix.de>
On Sun, Apr 26, 2020 at 04:55:25PM +0200, Thomas Gleixner wrote:
> Fenghua Yu <fenghua.yu@intel.com> writes:
> > diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h
> > index bdeae9291e5c..137bf51f19e6 100644
> > --- a/arch/x86/include/asm/mmu.h
> > +++ b/arch/x86/include/asm/mmu.h
> > @@ -50,6 +50,10 @@ typedef struct {
> > u16 pkey_allocation_map;
> > s16 execute_only_pkey;
> > #endif
> > +
> > +#ifdef CONFIG_INTEL_IOMMU_SVM
> > + int pasid;
>
> int? It's a value which gets programmed into the MSR along with the
> valid bit (bit 31) set.
BTW, ARM is working on PASID as well. Christoph suggested that the PASID
should be defined in mm_struct instead of mm->context so that both ARM and X86
can access it:
https://lore.kernel.org/linux-iommu/20200414170252.714402-1-jean-philippe@linaro.org/T/#mb57110ffe1aaa24750eeea4f93b611f0d1913911
So I will define "pasid" to mm_struct in a separate patch in the next version.
Thanks.
-Fenghua
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next prev parent reply other threads:[~2020-04-28 20:58 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 19:33 [PATCH 0/7] x86: tag application address space for devices Fenghua Yu
2020-03-30 19:33 ` [PATCH 1/7] docs: x86: Add a documentation for ENQCMD Fenghua Yu
2020-04-26 11:02 ` Thomas Gleixner
2020-04-27 20:13 ` Fenghua Yu
2020-03-30 19:33 ` [PATCH 2/7] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions Fenghua Yu
2020-04-26 11:06 ` Thomas Gleixner
2020-04-27 20:17 ` Fenghua Yu
2020-03-30 19:33 ` [PATCH 3/7] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature Fenghua Yu
2020-04-26 11:17 ` Thomas Gleixner
2020-04-27 20:33 ` Fenghua Yu
2020-03-30 19:33 ` [PATCH 4/7] x86/msr-index: Define IA32_PASID MSR Fenghua Yu
2020-04-26 11:22 ` Thomas Gleixner
2020-04-27 20:50 ` Fenghua Yu
2020-03-30 19:33 ` [PATCH 5/7] x86/mmu: Allocate/free PASID Fenghua Yu
2020-04-26 14:55 ` Thomas Gleixner
2020-04-27 22:18 ` Fenghua Yu
2020-04-27 23:44 ` Thomas Gleixner
2020-04-28 18:21 ` Jacob Pan (Jun)
2020-04-28 18:54 ` Thomas Gleixner
2020-04-28 19:07 ` Luck, Tony
2020-04-28 20:42 ` Jacob Pan (Jun)
2020-04-28 20:59 ` Luck, Tony
2020-04-28 22:13 ` Jacob Pan (Jun)
2020-04-28 22:32 ` Luck, Tony
2020-04-28 20:40 ` Jacob Pan (Jun)
2020-04-28 20:57 ` Fenghua Yu [this message]
2020-03-30 19:33 ` [PATCH 6/7] x86/traps: Fix up invalid PASID Fenghua Yu
2020-04-26 15:25 ` Thomas Gleixner
2020-04-27 20:11 ` Fenghua Yu
2020-04-28 0:13 ` Thomas Gleixner
2020-04-27 22:46 ` Raj, Ashok
2020-04-27 23:08 ` Luck, Tony
2020-04-28 0:20 ` Thomas Gleixner
2020-04-28 0:54 ` Thomas Gleixner
2020-04-28 1:08 ` Raj, Ashok
2020-03-30 19:33 ` [PATCH 7/7] x86/process: Clear PASID state for a newly forked/cloned thread Fenghua Yu
2020-04-22 20:41 ` [PATCH 0/7] x86: tag application address space for devices Fenghua Yu
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