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d="scan'208";a="291360614" Received: from otc-nc-03.jf.intel.com (HELO otc-nc-03) ([10.54.39.36]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2020 12:44:39 -0700 Date: Thu, 24 Sep 2020 12:44:37 -0700 From: "Raj, Ashok" To: Alex Williamson Subject: Re: [bugzilla-daemon@bugzilla.kernel.org: [Bug 209149] New: "iommu/vt-d: Enable PCI ACS for platform opt in hint" makes NVMe config space not accessible after S3] Message-ID: <20200924194437.GA85997@otc-nc-03> References: <20200923160327.GA2267374@bjorn-Precision-5520> <6CD003F6-DDF4-4C57-AD9E-79C8AB5C01BF@canonical.com> <20200924180905.GB85236@otc-nc-03> <20200924133938.6b93732f@x1.home> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200924133938.6b93732f@x1.home> User-Agent: Mutt/1.5.24 (2015-08-30) Cc: Joerg Roedel , "Jechlitschek, Christoph" , Sagi Grimberg , "open list:PCI SUBSYSTEM" , "open list:NVM EXPRESS DRIVER" , Jens Axboe , Lalithambika Krishnakumar , iommu@lists.linux-foundation.org, Kai-Heng Feng , Bjorn Helgaas , Keith Busch , Rajat Jain , Mika Westerberg , Christoph Hellwig , Ashok Raj X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Hi Alex > > Apparently it also requires to disable RR, and I'm not able to confirm if > > CML requires that as well. > > > > pci_quirk_disable_intel_spt_pch_acs_redir() also seems to consult the same > > table, so i'm not sure why we need the other patch in bugzilla is required. > > If we're talking about the Intel bug where PCH root ports implement > the ACS capability and control registers as dword rather than word > registers, then how is ACS getting enabled in order to generate an ACS > violation? The standard ACS code would write to the control register > word at offset 6, which is still the read-only capability register on > those devices. Thanks, Right... Maybe we need header log to figure out what exatly is happening. _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu