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Mon, 22 Mar 2021 10:53:40 -0700 (PDT) Date: Mon, 22 Mar 2021 10:53:38 -0700 From: Guenter Roeck To: Jacob Pan Subject: Re: [PATCH v2 1/4] iommu/vt-d: Enable write protect for supervisor SVM Message-ID: <20210322175338.GA24424@roeck-us.net> References: <1614680040-1989-1-git-send-email-jacob.jun.pan@linux.intel.com> <1614680040-1989-2-git-send-email-jacob.jun.pan@linux.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1614680040-1989-2-git-send-email-jacob.jun.pan@linux.intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Cc: "Tian, Kevin" , Raj Ashok , Jean-Philippe Brucker , Sanjay Kumar , LKML , iommu@lists.linux-foundation.org, David Woodhouse X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Tue, Mar 02, 2021 at 02:13:57AM -0800, Jacob Pan wrote: > Write protect bit, when set, inhibits supervisor writes to the read-only > pages. In supervisor shared virtual addressing (SVA), where page tables > are shared between CPU and DMA, IOMMU PASID entry WPE bit should match > CR0.WP bit in the CPU. > This patch sets WPE bit for supervisor PASIDs if CR0.WP is set. > > Signed-off-by: Sanjay Kumar > Signed-off-by: Jacob Pan > --- ia64:defconfig: drivers/iommu/intel/pasid.c: In function 'pasid_enable_wpe': drivers/iommu/intel/pasid.c:536:22: error: implicit declaration of function 'read_cr0' drivers/iommu/intel/pasid.c:539:23: error: 'X86_CR0_WP' undeclared Maybe it _is_ time to retire ia64 ? Guenter _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu