From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>
Cc: "Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Ashok Raj <ashok.raj@intel.com>,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
x86@kernel.org, woodhouse@osuosl.org,
linux-kernel@vger.kernel.org,
Stephane Eranian <eranian@google.com>,
Ricardo Neri <ricardo.neri@intel.com>,
iommu@lists.linux-foundation.org,
Jacob Pan <jacob.jun.pan@intel.com>,
Andi Kleen <andi.kleen@intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@suse.de>,
David Woodhouse <dwmw2@infradead.org>,
Ingo Molnar <mingo@kernel.org>
Subject: [RFC PATCH v5 7/7] x86/watchdog/hardlockup/hpet: Support interrupt remapping
Date: Tue, 4 May 2021 12:10:49 -0700 [thread overview]
Message-ID: <20210504191049.22661-8-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <20210504191049.22661-1-ricardo.neri-calderon@linux.intel.com>
When interrupt remapping is enabled in the system, the MSI interrupt
address and data fields must follow a special format that the IOMMU
defines.
However, the HPET hardlockup detector must rely on the interrupt
subsystem to have the interrupt remapping drivers allocate, activate,
and set the affinity of HPET timer interrupt. Hence, it must use
request_irq() to use such functionality.
In x86 there is not an IRQF_NMI flag to indicate to the interrupt
subsystem the delivery mode of the interrupt. A previous changset added
functionality to detect the interrupt of the HPET hardlockup detector
and fixup the delivery mode accordingly.
Also, since request_irq() is used, a non-NMI interrupt handler must be
defined. Even if it is not needed.
When Interrupt Remapping is enabled, use the new facility to ensure
interrupt is plumbed properly to work with interrupt remapping.
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Andi Kleen <andi.kleen@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: David Woodhouse <dwmw2@infradead.org> (supporter:INTEL IOMMU (VT-d))
Cc: "Ravi V. Shankar" <ravi.v.shankar@intel.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Jacob Pan <jacob.jun.pan@intel.com>
Cc: Lu Baolu <baolu.lu@linux.intel.com> (supporter:INTEL IOMMU (VT-d))
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: iommu@lists.linux-foundation.org (open list:INTEL IOMMU (VT-d))
Cc: x86@kernel.org
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
Changes since v4:
* Use request_irq() to obtain an IRTE for the HPET hardlockup detector
instead of the custom interfaces previously implemented in the
interrupt remapping drivers.
* Simplified detection of interrupt remapping by checking the parent
of the HPET irq domain.
* Stopped using the HPET magic fields of struct irq_alloc_info. They
were removed in commit 2bf1e7bcedb8 ("x86/msi: Consolidate HPET
allocation")
* Rephrased commit message for clarity. (Ashok)
* Clarified error message of non-NMI handler. (Ashok)
Changes since v3:
* None
Changes since v2:
* None
Changes since v1:
* Introduced this patch. Added custom functions in the Intel IOMMU driver
to allocate an IRTE for the HPET hardlockup detector.
---
arch/x86/include/asm/hpet.h | 2 ++
arch/x86/kernel/hpet.c | 3 ++
arch/x86/kernel/watchdog_hld_hpet.c | 48 +++++++++++++++++++++++++----
3 files changed, 47 insertions(+), 6 deletions(-)
diff --git a/arch/x86/include/asm/hpet.h b/arch/x86/include/asm/hpet.h
index 5bf675970d4b..d130285ddc96 100644
--- a/arch/x86/include/asm/hpet.h
+++ b/arch/x86/include/asm/hpet.h
@@ -109,6 +109,7 @@ extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
* @tsc_ticks_per_group: TSC ticks that must elapse for each group of
* monitored CPUs.
* @irq: IRQ number assigned to the HPET channel
+ * @int_remap_enabled: True if interrupt remapping is enabled
* @handling_cpu: CPU handling the HPET interrupt
* @pkgs_per_group: Number of physical packages in a group of CPUs
* receiving an IPI
@@ -133,6 +134,7 @@ struct hpet_hld_data {
u64 tsc_next;
u64 tsc_ticks_per_group;
int irq;
+ bool intr_remap_enabled;
u32 handling_cpu;
u32 pkgs_per_group;
u32 nr_groups;
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 3e43e0f348b8..ff4abdef5e15 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -1464,6 +1464,9 @@ struct hpet_hld_data *hpet_hld_get_timer(void)
if (!hpet_domain)
goto err;
+ if (hpet_domain->parent != x86_vector_domain)
+ hld_data->intr_remap_enabled = true;
+
hc->mode = HPET_MODE_NMI_WATCHDOG;
irq = hpet_assign_irq(hpet_domain, hc, hc->num);
if (irq <= 0)
diff --git a/arch/x86/kernel/watchdog_hld_hpet.c b/arch/x86/kernel/watchdog_hld_hpet.c
index 3fd2405b31fa..265641d001ac 100644
--- a/arch/x86/kernel/watchdog_hld_hpet.c
+++ b/arch/x86/kernel/watchdog_hld_hpet.c
@@ -176,6 +176,14 @@ static int update_msi_destid(struct hpet_hld_data *hdata)
{
u32 destid;
+ if (hdata->intr_remap_enabled) {
+ int ret;
+
+ ret = irq_set_affinity(hdata->irq,
+ cpumask_of(hdata->handling_cpu));
+ return ret;
+ }
+
destid = apic->calc_dest_apicid(hdata->handling_cpu);
/*
* HPET only supports a 32-bit MSI address register. Thus, only
@@ -393,26 +401,52 @@ static int hardlockup_detector_nmi_handler(unsigned int type,
return NMI_DONE;
}
+/*
+ * When interrupt remapping is enabled, we request the irq for the detector
+ * using request_irq() and then we fixup the delivery mode to NMI using
+ * is_hpet_irq_hardlockup_detector(). If the latter fails, we will see a non-
+ * NMI interrupt.
+ *
+ */
+static irqreturn_t hardlockup_detector_irq_handler(int irq, void *data)
+{
+ pr_err_once("Received a non-NMI interrupt. The HLD detector always uses NMIs!\n");
+ return IRQ_HANDLED;
+}
+
/**
* setup_irq_msi_mode() - Configure the timer to deliver an MSI interrupt
* @data: Data associated with the instance of the HPET timer to configure
*
* Configure the HPET timer to deliver interrupts via the Front-
* Side Bus.
+ *
+ * Returns:
+ * 0 success. An error code if setup was unsuccessful.
*/
-static void setup_irq_msi_mode(struct hpet_hld_data *hdata)
+static int setup_irq_msi_mode(struct hpet_hld_data *hdata)
{
+ s32 ret;
u32 v;
- compose_msi_msg(hdata);
- hpet_writel(hdata->msi_msg.data, HPET_Tn_ROUTE(hdata->channel));
- hpet_writel(hdata->msi_msg.address_lo,
- HPET_Tn_ROUTE(hdata->channel) + 4);
+ if (hdata->intr_remap_enabled) {
+ ret = request_irq(hld_data->irq, hardlockup_detector_irq_handler,
+ IRQF_TIMER, "hpet_hld", hld_data);
+ if (ret)
+ return ret;
+ } else {
+ compose_msi_msg(hdata);
+ hpet_writel(hdata->msi_msg.data, HPET_Tn_ROUTE(hdata->channel));
+ hpet_writel(hdata->msi_msg.address_lo,
+ HPET_Tn_ROUTE(hdata->channel) + 4);
+ }
v = hpet_readl(HPET_Tn_CFG(hdata->channel));
v |= HPET_TN_FSB;
hpet_writel(v, HPET_Tn_CFG(hdata->channel));
+
+ return 0;
}
/**
@@ -430,7 +464,9 @@ static int setup_hpet_irq(struct hpet_hld_data *hdata)
{
int ret;
- setup_irq_msi_mode(hdata);
+ ret = setup_irq_msi_mode(hdata);
+ if (ret)
+ return ret;
ret = register_nmi_handler(NMI_WATCHDOG,
hardlockup_detector_nmi_handler, 0,
--
2.17.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
prev parent reply other threads:[~2021-05-04 19:11 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-04 19:10 [RFC PATCH v5 0/7] x86: watchdog/hardlockup/hpet: Add support for interrupt remapping Ricardo Neri
2021-05-04 19:10 ` [RFC PATCH v5 1/7] x86/apic: Add irq_cfg::delivery_mode Ricardo Neri
2021-05-04 19:10 ` [RFC PATCH v5 2/7] x86/hpet: Introduce function to identify HPET hardlockup detector irq Ricardo Neri
2021-05-04 19:10 ` [RFC PATCH v5 3/7] iommu/vt-d: Rework prepare_irte() to support per-irq delivery mode Ricardo Neri
2021-05-04 19:10 ` [RFC PATCH v5 4/7] iommu/amd: Set the IRTE delivery mode from irq_cfg Ricardo Neri
2021-05-04 19:10 ` [RFC PATCH v5 5/7] iommu/vt-d: Fixup delivery mode of the HPET hardlockup interrupt Ricardo Neri
2021-05-04 23:03 ` Thomas Gleixner
2021-05-14 1:57 ` Ricardo Neri
2021-05-14 21:31 ` Thomas Gleixner
2021-05-04 19:10 ` [RFC PATCH v5 6/7] iommu/amd: " Ricardo Neri
2021-05-04 19:10 ` Ricardo Neri [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210504191049.22661-8-ricardo.neri-calderon@linux.intel.com \
--to=ricardo.neri-calderon@linux.intel.com \
--cc=andi.kleen@intel.com \
--cc=ashok.raj@intel.com \
--cc=bp@suse.de \
--cc=dwmw2@infradead.org \
--cc=eranian@google.com \
--cc=iommu@lists.linux-foundation.org \
--cc=jacob.jun.pan@intel.com \
--cc=joro@8bytes.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@kernel.org \
--cc=ravi.v.shankar@intel.com \
--cc=ricardo.neri@intel.com \
--cc=tglx@linutronix.de \
--cc=will@kernel.org \
--cc=woodhouse@osuosl.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox