From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp1.osuosl.org (smtp1.osuosl.org [140.211.166.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E20A7C433F5 for ; Tue, 15 Feb 2022 13:42:45 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp1.osuosl.org (Postfix) with ESMTP id 848CB82778; Tue, 15 Feb 2022 13:42:45 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp1.osuosl.org ([127.0.0.1]) by localhost (smtp1.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DZEAVFlUW_1Y; Tue, 15 Feb 2022 13:42:44 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by smtp1.osuosl.org (Postfix) with ESMTPS id 57BFE81A29; Tue, 15 Feb 2022 13:42:44 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id E4352C0078; Tue, 15 Feb 2022 13:42:43 +0000 (UTC) Received: from smtp3.osuosl.org (smtp3.osuosl.org [140.211.166.136]) by lists.linuxfoundation.org (Postfix) with ESMTP id 2D988C000B for ; Tue, 15 Feb 2022 13:42:43 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp3.osuosl.org (Postfix) with ESMTP id 0E46A60E8E for ; Tue, 15 Feb 2022 13:42:43 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Authentication-Results: smtp3.osuosl.org (amavisd-new); dkim=pass (2048-bit key) header.d=kernel.org Received: from smtp3.osuosl.org ([127.0.0.1]) by localhost (smtp3.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Z4ivQIvz08JW for ; Tue, 15 Feb 2022 13:42:42 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.8.0 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by smtp3.osuosl.org (Postfix) with ESMTPS id 546BE60881 for ; Tue, 15 Feb 2022 13:42:42 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 95B63616F7; Tue, 15 Feb 2022 13:42:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3FE7EC340EB; Tue, 15 Feb 2022 13:42:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644932561; bh=sPlaSv3uGOe1rBpD1b6tMALG2r6FmsdUBd5JcLKY/rQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ADHUvjwj9Oe3t/tiApaS/AJnM1P+CQUcZQ67xTzYYvFNmBcU1uCzzqF7NWYQalEvy gJTNSlIWBWLuO+yail/1N4zB3JbCP/vmE/7+2FtS6ugoJoSkgJMepB7C5FZ2AmySkH dT3RoLsrzDOtZrq6vybeG4gwPznNokPn/Hq2GbspR15L4i3CTCI5BTMmGur2g4Qgf1 eSU4GbZUlO7oaFBXg53tDI4A6EIrrFWJptmLb3aKsN+8We+9miOuPr5p9w1pPNwp73 VpY76Z9RlyGgJnEDvQ9tbgwf9sDiLVWhxwgubw3X9L3L+uYUF/fHrmNOnZW2OhEIK0 qXCu2FNGJ5kTQ== Date: Tue, 15 Feb 2022 13:42:32 +0000 From: Will Deacon To: Robin Murphy Subject: Re: [PATCH v3 8/8] iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity Message-ID: <20220215134232.GA7592@willie-the-truck> References: <20220124131118.17887-1-yangyicong@hisilicon.com> <20220124131118.17887-9-yangyicong@hisilicon.com> <20220215130044.GA7154@willie-the-truck> <9018a1d9-4d42-3a99-dbc6-c55139abcb1e@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <9018a1d9-4d42-3a99-dbc6-c55139abcb1e@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) Cc: mark.rutland@arm.com, prime.zeng@huawei.com, alexander.shishkin@linux.intel.com, linux-pci@vger.kernel.org, linuxarm@huawei.com, Yicong Yang , daniel.thompson@linaro.org, peterz@infradead.org, mingo@redhat.com, helgaas@kernel.org, liuqi115@huawei.com, mike.leach@linaro.org, suzuki.poulose@arm.com, coresight@lists.linaro.org, acme@kernel.org, zhangshaokun@hisilicon.com, linux-arm-kernel@lists.infradead.org, mathieu.poirier@linaro.org, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, iommu@lists.linux-foundation.org, leo.yan@linaro.org, Yicong Yang X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Tue, Feb 15, 2022 at 01:30:26PM +0000, Robin Murphy wrote: > On 2022-02-15 13:00, Will Deacon wrote: > > On Mon, Feb 14, 2022 at 08:55:20PM +0800, Yicong Yang wrote: > > > On 2022/1/24 21:11, Yicong Yang wrote: > > > > The DMA of HiSilicon PTT device can only work with identical > > > > mapping. So add a quirk for the device to force the domain > > > > passthrough. > > > > > > > > Signed-off-by: Yicong Yang > > > > --- > > > > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 ++++++++++++++++ > > > > 1 file changed, 16 insertions(+) > > > > > > > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > > > index 6dc6d8b6b368..6f67a2b1dd27 100644 > > > > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > > > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > > > > @@ -2838,6 +2838,21 @@ static int arm_smmu_dev_disable_feature(struct device *dev, > > > > } > > > > } > > > > +#define IS_HISI_PTT_DEVICE(pdev) ((pdev)->vendor == PCI_VENDOR_ID_HUAWEI && \ > > > > + (pdev)->device == 0xa12e) > > > > + > > > > +static int arm_smmu_def_domain_type(struct device *dev) > > > > +{ > > > > + if (dev_is_pci(dev)) { > > > > + struct pci_dev *pdev = to_pci_dev(dev); > > > > + > > > > + if (IS_HISI_PTT_DEVICE(pdev)) > > > > + return IOMMU_DOMAIN_IDENTITY; > > > > + } > > > > + > > > > + return 0; > > > > +} > > > > + > > > > static struct iommu_ops arm_smmu_ops = { > > > > .capable = arm_smmu_capable, > > > > .domain_alloc = arm_smmu_domain_alloc, > > > > @@ -2863,6 +2878,7 @@ static struct iommu_ops arm_smmu_ops = { > > > > .sva_unbind = arm_smmu_sva_unbind, > > > > .sva_get_pasid = arm_smmu_sva_get_pasid, > > > > .page_response = arm_smmu_page_response, > > > > + .def_domain_type = arm_smmu_def_domain_type, > > > > .pgsize_bitmap = -1UL, /* Restricted during device attach */ > > > > .owner = THIS_MODULE, > > > > }; > > > > > > > > > > Is this quirk ok with the SMMU v3 driver? Just want to confirm that I'm on the > > > right way to dealing with the issue of our device. > > > > I don't think the quirk should be in the SMMUv3 driver. Assumedly, you would > > have the exact same problem if you stuck the PTT device behind a different > > type of IOMMU, and so the quirk should be handled by a higher level of the > > stack. > > Conceptually, yes, but I'm inclined to be pragmatic here. Default domain > quirks could only move out as far as the other end of the call from > iommu_get_def_domain_type() - it's not like we could rely on some flag in a > driver which may not even be loaded yet, let alone matched to the device. > And even then there's an equal and opposite argument for why the core code > should have to maintain a list of platform-specific quirks rather than code > specific to the relevant platforms. The fact is that a HiSilicon RCiEP is > not going to end up behind anything other than a HiSilicon IOMMU, and if > those ever stop being SMMUv3 *and* such a quirk still exists we can worry > about it then. Perhaps, but you know that by adding this hook it's only a matter of time before we get random compatible string matches in there, so I'd rather keep the flood gates closed as long as we can. Given that this is a PCI device, why can't we have a PCI quirk for devices which require an identity mapping and then handle that in the IOMMU core? > Ugly as it is, this is the status quo. I don't recall anyone ever arguing > that the equivalent quirks for Intel integrated graphics should be made > generic ;) I don't know anything about Intel integrated graphics. Have they solved this problem in a better way, or could they equally make use of a generic quirk? Will _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu