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From: Vasant Hegde via iommu <iommu@lists.linux-foundation.org>
To: <iommu@lists.linux-foundation.org>, <joro@8bytes.org>
Cc: Vasant Hegde <vasant.hegde@amd.com>
Subject: [RESEND PATCH v1 28/37] iommu/amd: Remove global amd_iommu_alias_table
Date: Mon, 4 Apr 2022 15:30:14 +0530	[thread overview]
Message-ID: <20220404100023.324645-29-vasant.hegde@amd.com> (raw)
In-Reply-To: <20220404100023.324645-1-vasant.hegde@amd.com>

From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

This is replaced by the per PCI segment alias table.
Also remove alias_table_size variable.

Co-developed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 drivers/iommu/amd/amd_iommu_types.h |  6 ------
 drivers/iommu/amd/init.c            | 24 ------------------------
 2 files changed, 30 deletions(-)

diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index dc76ee2c3ea5..0aa170014b85 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -826,12 +826,6 @@ struct unity_map_entry {
  * Data structures for device handling
  */
 
-/*
- * Alias table to find requestor ids to device ids. Not locked because only
- * read on runtime.
- */
-extern u16 *amd_iommu_alias_table;
-
 /* size of the dma_ops aperture as power of 2 */
 extern unsigned amd_iommu_aperture_order;
 
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index dd667dfb4355..b3905b1c4bc9 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -185,21 +185,12 @@ static bool amd_iommu_pc_present __read_mostly;
 
 bool amd_iommu_force_isolation __read_mostly;
 
-/*
- * The alias table is a driver specific data structure which contains the
- * mappings of the PCI device ids to the actual requestor ids on the IOMMU.
- * More than one device can share the same requestor id.
- */
-u16 *amd_iommu_alias_table;
-
 /*
  * AMD IOMMU allows up to 2^16 different protection domains. This is a bitmap
  * to know which ones are already in use.
  */
 unsigned long *amd_iommu_pd_alloc_bitmap;
 
-static u32 alias_table_size;	/* size of the alias table */
-
 enum iommu_init_state {
 	IOMMU_START_STATE,
 	IOMMU_IVRS_DETECTED,
@@ -2791,10 +2782,6 @@ static void __init free_iommu_resources(void)
 	kmem_cache_destroy(amd_iommu_irq_cache);
 	amd_iommu_irq_cache = NULL;
 
-	free_pages((unsigned long)amd_iommu_alias_table,
-		   get_order(alias_table_size));
-	amd_iommu_alias_table = NULL;
-
 	free_iommu_all();
 	free_pci_segment();
 }
@@ -2923,20 +2910,9 @@ static int __init early_amd_iommu_init(void)
 	amd_iommu_target_ivhd_type = get_highest_supported_ivhd_type(ivrs_base);
 	DUMP_printk("Using IVHD type %#x\n", amd_iommu_target_ivhd_type);
 
-	alias_table_size   = tbl_size(ALIAS_TABLE_ENTRY_SIZE);
-
 	/* Device table - directly used by all IOMMUs */
 	ret = -ENOMEM;
 
-	/*
-	 * Alias table - map PCI Bus/Dev/Func to Bus/Dev/Func the
-	 * IOMMU see for that device
-	 */
-	amd_iommu_alias_table = (void *)__get_free_pages(GFP_KERNEL,
-			get_order(alias_table_size));
-	if (amd_iommu_alias_table == NULL)
-		goto out;
-
 	amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages(
 					    GFP_KERNEL | __GFP_ZERO,
 					    get_order(MAX_DOMAIN_ID/8));
-- 
2.27.0

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  parent reply	other threads:[~2022-04-04 10:07 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-04  9:59 [RESEND PATCH v1 00/37] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 01/37] iommu/amd: Update struct iommu_dev_data defination Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 02/37] iommu/amd: Introduce pci segment structure Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 03/37] iommu/amd: Introduce per PCI segment device table Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 04/37] iommu/amd: Introduce per PCI segment rlookup table Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 05/37] iommu/amd: Introduce per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 06/37] iommu/amd: Introduce per PCI segment dev_data_list Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 07/37] iommu/amd: Introduce per PCI segment old_dev_tbl_cpy Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 08/37] iommu/amd: Introduce per PCI segment alias_table Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 09/37] iommu/amd: Introduce per PCI segment unity map list Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 10/37] iommu/amd: Introduce per PCI segment last_bdf Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 11/37] iommu/amd: Introduce per PCI segment device table size Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 12/37] iommu/amd: Introduce per PCI segment alias " Vasant Hegde via iommu
2022-04-04  9:59 ` [RESEND PATCH v1 13/37] iommu/amd: Introduce per PCI segment rlookup " Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 14/37] iommu/amd: Convert to use per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 15/37] iommu/amd: Convert to use rlookup_amd_iommu helper function Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 16/37] iommu/amd: Update irq_remapping_alloc to use IOMMU lookup " Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 17/37] iommu/amd: Introduce struct amd_ir_data.iommu Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 18/37] iommu/amd: Update amd_irte_ops functions Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 19/37] iommu/amd: Update alloc_irq_table and alloc_irq_index Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 20/37] iommu/amd: Convert to use per PCI segment rlookup_table Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 21/37] iommu/amd: Update set_dte_entry and clear_dte_entry Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 22/37] iommu/amd: Update iommu_ignore_device Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 23/37] iommu/amd: Update dump_dte_entry Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 24/37] iommu/amd: Update set_dte_irq_entry Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 25/37] iommu/amd: Update (un)init_device_table_dma() Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 26/37] iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit() Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 27/37] iommu/amd: Remove global amd_iommu_dev_table Vasant Hegde via iommu
2022-04-04 10:00 ` Vasant Hegde via iommu [this message]
2022-04-04 10:00 ` [RESEND PATCH v1 29/37] iommu/amd: Remove global amd_iommu_last_bdf Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 30/37] iommu/amd: Flush upto last_bdf only Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 31/37] iommu/amd: Introduce get_device_sbdf_id() helper function Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 32/37] iommu/amd: Include PCI segment ID when initialize IOMMU Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 33/37] iommu/amd: Specify PCI segment ID when getting pci device Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 34/37] iommu/amd: Add PCI segment support for ivrs_ioapic, ivrs_hpet, ivrs_acpihid commands Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 35/37] iommu/amd: Print PCI segment ID in error log messages Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 36/37] iommu/amd: Update device_state structure to include PCI seg ID Vasant Hegde via iommu
2022-04-04 10:00 ` [RESEND PATCH v1 37/37] iommu/amd: Update amd_iommu_fault " Vasant Hegde via iommu
2022-04-12 14:57 ` [RESEND PATCH v1 00/37] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu

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