From: Suravee Suthikulpanit via iommu <iommu@lists.linux-foundation.org>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux-foundation.org>
Cc: jon.grimm@amd.com, vasant.hegde@amd.com
Subject: [PATCH] iommu/amd: Set translation valid bit only when IO page tables are in used
Date: Wed, 20 Apr 2022 06:29:20 -0500 [thread overview]
Message-ID: <20220420112920.18091-1-suravee.suthikulpanit@amd.com> (raw)
On AMD system with SNP enabled, IOMMU hardware checks the host translation
valid (TV) and guest translation valid (GV) bits in the device
table entry (DTE) before accessing the corresponded page tables.
However, current IOMMU driver sets the TV bit for all devices
regardless of whether the host page table is in used.
This results in ILLEGAL_DEV_TABLE_ENTRY event for devices, which
do not the host page table root pointer set up.
Thefore, only set TV bit when host or guest page tables are in used.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/init.c | 4 +---
drivers/iommu/amd/iommu.c | 13 +++++++++++--
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index b4a798c7b347..4f483f22e58c 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -2337,10 +2337,8 @@ static void init_device_table_dma(void)
{
u32 devid;
- for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) {
+ for (devid = 0; devid <= amd_iommu_last_bdf; ++devid)
set_dev_entry_bit(devid, DEV_ENTRY_VALID);
- set_dev_entry_bit(devid, DEV_ENTRY_TRANSLATION);
- }
}
static void __init uninit_device_table_dma(void)
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index a1ada7bff44e..6dd35998e53c 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -1473,7 +1473,7 @@ static void set_dte_entry(u16 devid, struct protection_domain *domain,
pte_root |= (domain->iop.mode & DEV_ENTRY_MODE_MASK)
<< DEV_ENTRY_MODE_SHIFT;
- pte_root |= DTE_FLAG_IR | DTE_FLAG_IW | DTE_FLAG_V | DTE_FLAG_TV;
+ pte_root |= DTE_FLAG_IR | DTE_FLAG_IW | DTE_FLAG_V;
flags = amd_iommu_dev_table[devid].data[1];
@@ -1513,6 +1513,15 @@ static void set_dte_entry(u16 devid, struct protection_domain *domain,
flags |= tmp;
}
+ /*
+ * Only set TV bit when:
+ * - IOMMUv1 table is in used.
+ * - IOMMUv2 table is in used.
+ */
+ if ((domain->iop.mode != PAGE_MODE_NONE) ||
+ (domain->flags & PD_IOMMUV2_MASK))
+ pte_root |= DTE_FLAG_TV;
+
flags &= ~DEV_DOMID_MASK;
flags |= domain->id;
@@ -1535,7 +1544,7 @@ static void set_dte_entry(u16 devid, struct protection_domain *domain,
static void clear_dte_entry(u16 devid)
{
/* remove entry from the device table seen by the hardware */
- amd_iommu_dev_table[devid].data[0] = DTE_FLAG_V | DTE_FLAG_TV;
+ amd_iommu_dev_table[devid].data[0] = DTE_FLAG_V;
amd_iommu_dev_table[devid].data[1] &= DTE_FLAG_MASK;
amd_iommu_apply_erratum_63(devid);
--
2.25.1
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next reply other threads:[~2022-04-20 11:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-20 11:29 Suravee Suthikulpanit via iommu [this message]
2022-04-28 7:34 ` [PATCH] iommu/amd: Set translation valid bit only when IO page tables are in used Vasant Hegde via iommu
2022-04-28 17:16 ` Suravee Suthikulpanit via iommu
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