From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp1.osuosl.org (smtp1.osuosl.org [140.211.166.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 953C3C433F5 for ; Sun, 1 May 2022 11:27:54 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp1.osuosl.org (Postfix) with ESMTP id 52DA4825C7; Sun, 1 May 2022 11:27:54 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp1.osuosl.org ([127.0.0.1]) by localhost (smtp1.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id auLU0nrUPwOY; Sun, 1 May 2022 11:27:53 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [IPv6:2605:bc80:3010:104::8cd3:938]) by smtp1.osuosl.org (Postfix) with ESMTPS id 4AB7C82681; Sun, 1 May 2022 11:27:53 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 307BBC0039; Sun, 1 May 2022 11:27:53 +0000 (UTC) Received: from smtp4.osuosl.org (smtp4.osuosl.org [IPv6:2605:bc80:3010::137]) by lists.linuxfoundation.org (Postfix) with ESMTP id 56CB7C002D for ; Sun, 1 May 2022 11:27:52 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp4.osuosl.org (Postfix) with ESMTP id 5104C408A0 for ; Sun, 1 May 2022 11:27:52 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Authentication-Results: smtp4.osuosl.org (amavisd-new); dkim=pass (2048-bit key) header.d=intel.com Received: from smtp4.osuosl.org ([127.0.0.1]) by localhost (smtp4.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id a_hJKA6eEOaR for ; Sun, 1 May 2022 11:27:51 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.8.0 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by smtp4.osuosl.org (Postfix) with ESMTPS id 8C7B2408EC for ; Sun, 1 May 2022 11:27:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651404471; x=1682940471; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5zmR7Xs8756n/cIviDuKs63tUWLeK4DQi3HgXVUT7kk=; b=XYa98z4mv6EDmR/wrAeeo/AhUENEhHqnDAIn4bO7tJNa1WQXAxNznv4c L3KvbF5mifM9qdT7VEKx7DgVl5moV0DOPm4oDysqACvp+GKMw57BDKk0b RJmZ27hkWTh5z3uRH23LBi7sMopqMgYiENQmPr/EhYHpSZvW8cE8bVjwL 0tt+REcGIClxuYA1DnpT1zQevZsTIUoSLUCHRb2oE3qHuF8iC4Ck+K4yw onl/tdcIplrZU0fAw81w0EGTngD5XSecge+RNSIhPtnE90ihNWgQCFpwC iNL7fcEWZWZnCCC6AuTW0TKsVB/B9RB23U27n8ClGA/kfGQuHPv77owsT A==; X-IronPort-AV: E=McAfee;i="6400,9594,10333"; a="292178346" X-IronPort-AV: E=Sophos;i="5.91,189,1647327600"; d="scan'208";a="292178346" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 May 2022 04:27:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,189,1647327600"; d="scan'208";a="545114827" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga002.jf.intel.com with ESMTP; 01 May 2022 04:27:48 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Alex Williamson , Kevin Tian Subject: [PATCH 2/5] iommu/vt-d: Set SNP bit only in second-level page table entries Date: Sun, 1 May 2022 19:24:31 +0800 Message-Id: <20220501112434.874236-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220501112434.874236-1-baolu.lu@linux.intel.com> References: <20220501112434.874236-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Cc: iommu@lists.linux-foundation.org, Jacob jun Pan , linux-kernel@vger.kernel.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" The SNP bit is only valid for second-level PTEs. Setting this bit in the first-level PTEs has no functional impact because the Intel IOMMU always ignores the same bit in first-level PTEs. Anyway, let's check the page table type before setting SNP bit in PTEs to make the code more readable. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index d68f5bbf3e93..98050943d863 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4431,7 +4431,7 @@ static int intel_iommu_map(struct iommu_domain *domain, prot |= DMA_PTE_READ; if (iommu_prot & IOMMU_WRITE) prot |= DMA_PTE_WRITE; - if (dmar_domain->force_snooping) + if (dmar_domain->force_snooping && !domain_use_first_level(dmar_domain)) prot |= DMA_PTE_SNP; max_addr = iova + size; -- 2.25.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu