From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Kevin Tian <kevin.tian@intel.com>,
Muhammad Usama Anjum <usama.anjum@collabora.com>,
iommu@lists.linux-foundation.org,
Jason Gunthorpe <jgg@nvidia.com>, Christoph Hellwig <hch@lst.de>
Subject: [PATCH 8/8] iommu/vt-d: Remove hard coding PGSNP bit in PASID entries
Date: Tue, 10 May 2022 10:34:07 +0800 [thread overview]
Message-ID: <20220510023407.2759143-9-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20220510023407.2759143-1-baolu.lu@linux.intel.com>
As enforce_cache_coherency has been introduced into the iommu_domain_ops,
the kernel component which owns the iommu domain is able to opt-in its
requirement for force snooping support. The iommu driver has no need to
hard code the page snoop control bit in the PASID table entries anymore.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20220508123525.1973626-1-baolu.lu@linux.intel.com
---
drivers/iommu/intel/pasid.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index d19dd66a670c..cb4c1d0cf25c 100644
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -710,9 +710,6 @@ int intel_pasid_setup_second_level(struct intel_iommu *iommu,
pasid_set_fault_enable(pte);
pasid_set_page_snoop(pte, !!ecap_smpwc(iommu->ecap));
- if (domain->domain.type == IOMMU_DOMAIN_UNMANAGED)
- pasid_set_pgsnp(pte);
-
/*
* Since it is a second level only translation setup, we should
* set SRE bit as well (addresses are expected to be GPAs).
--
2.25.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2022-05-10 2:37 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-10 2:33 [PATCH 0/8] [PULL REQUEST] Intel IOMMU updates for Linux v5.19 Lu Baolu
2022-05-10 2:34 ` [PATCH 1/8] iommu/vt-d: Remove unneeded validity check on dev Lu Baolu
2022-05-10 2:34 ` [PATCH 2/8] iommu/vt-d: Change return type of dmar_insert_one_dev_info() Lu Baolu
2022-05-10 2:34 ` [PATCH 3/8] iommu/vt-d: Fold dmar_insert_one_dev_info() into its caller Lu Baolu
2022-05-10 2:34 ` [PATCH 4/8] iommu/vt-d: Size Page Request Queue to avoid overflow condition Lu Baolu
2022-05-10 2:34 ` [PATCH 5/8] iommu/vt-d: Block force-snoop domain attaching if no SC support Lu Baolu
2022-05-10 2:34 ` [PATCH 6/8] iommu/vt-d: Check domain force_snooping against attached devices Lu Baolu
2022-05-10 2:34 ` [PATCH 7/8] iommu/vt-d: Remove domain_update_iommu_snooping() Lu Baolu
2022-05-10 2:34 ` Lu Baolu [this message]
2022-05-13 13:15 ` [PATCH 0/8] [PULL REQUEST] Intel IOMMU updates for Linux v5.19 Joerg Roedel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220510023407.2759143-9-baolu.lu@linux.intel.com \
--to=baolu.lu@linux.intel.com \
--cc=hch@lst.de \
--cc=iommu@lists.linux-foundation.org \
--cc=jgg@nvidia.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=usama.anjum@collabora.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox