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Mon, 30 May 2022 11:03:58 -0700 (PDT) Received: from helium.lan ([88.160.162.107]) by smtp.gmail.com with ESMTPSA id 9-20020a1c0209000000b00397550b387bsm1647wmc.23.2022.05.30.11.03.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 May 2022 11:03:57 -0700 (PDT) From: Fabien Parent To: Yong Wu , Joerg Roedel , Will Deacon , Matthias Brugger Subject: [PATCH 2/3] iommu: mtk_iommu: add support for 6-bit encoded port IDs Date: Mon, 30 May 2022 20:03:27 +0200 Message-Id: <20220530180328.845692-2-fparent@baylibre.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220530180328.845692-1-fparent@baylibre.com> References: <20220530180328.845692-1-fparent@baylibre.com> MIME-Version: 1.0 Cc: Fabien Parent , iommu@lists.linux-foundation.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Until now the port ID was always encoded as a 5-bit data. On MT8365, the port ID is encoded as a 6-bit data. This requires to rework the macros F_MMU_INT_ID_LARB_ID, and F_MMU_INT_ID_PORT_ID in order to support 5-bit and 6-bit encoded port IDs. Signed-off-by: Fabien Parent --- drivers/iommu/mtk_iommu.c | 17 +++++++++++++---- drivers/iommu/mtk_iommu.h | 1 + 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 6fd75a60abd6..b692347d8d56 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -103,8 +103,10 @@ #define REG_MMU1_INT_ID 0x154 #define F_MMU_INT_ID_COMM_ID(a) (((a) >> 9) & 0x7) #define F_MMU_INT_ID_SUB_COMM_ID(a) (((a) >> 7) & 0x3) -#define F_MMU_INT_ID_LARB_ID(a) (((a) >> 7) & 0x7) -#define F_MMU_INT_ID_PORT_ID(a) (((a) >> 2) & 0x1f) +#define F_MMU_INT_ID_LARB_ID(a, port_width) \ + ((a) >> ((port_width + 2) & 0x7)) +#define F_MMU_INT_ID_PORT_ID(a, port_width) \ + (((a) >> 2) & GENMASK(port_width - 1, 0)) #define MTK_PROTECT_PA_ALIGN 256 @@ -291,12 +293,13 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id) fault_pa |= (u64)pa34_32 << 32; } - fault_port = F_MMU_INT_ID_PORT_ID(regval); + fault_port = F_MMU_INT_ID_PORT_ID(regval, data->plat_data->port_width); if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_SUB_COMM)) { fault_larb = F_MMU_INT_ID_COMM_ID(regval); sub_comm = F_MMU_INT_ID_SUB_COMM_ID(regval); } else { - fault_larb = F_MMU_INT_ID_LARB_ID(regval); + fault_larb = F_MMU_INT_ID_LARB_ID(regval, + data->plat_data->port_width); } fault_larb = data->plat_data->larbid_remap[fault_larb][sub_comm]; @@ -1034,6 +1037,7 @@ static const struct mtk_iommu_plat_data mt2712_data = { .iova_region = single_domain, .iova_region_nr = ARRAY_SIZE(single_domain), .larbid_remap = {{0}, {1}, {2}, {3}, {4}, {5}, {6}, {7}}, + .port_width = 5, }; static const struct mtk_iommu_plat_data mt6779_data = { @@ -1043,6 +1047,7 @@ static const struct mtk_iommu_plat_data mt6779_data = { .iova_region = single_domain, .iova_region_nr = ARRAY_SIZE(single_domain), .larbid_remap = {{0}, {1}, {2}, {3}, {5}, {7, 8}, {10}, {9}}, + .port_width = 5, }; static const struct mtk_iommu_plat_data mt8167_data = { @@ -1052,6 +1057,7 @@ static const struct mtk_iommu_plat_data mt8167_data = { .iova_region = single_domain, .iova_region_nr = ARRAY_SIZE(single_domain), .larbid_remap = {{0}, {1}, {2}}, /* Linear mapping. */ + .port_width = 5, }; static const struct mtk_iommu_plat_data mt8173_data = { @@ -1062,6 +1068,7 @@ static const struct mtk_iommu_plat_data mt8173_data = { .iova_region = single_domain, .iova_region_nr = ARRAY_SIZE(single_domain), .larbid_remap = {{0}, {1}, {2}, {3}, {4}, {5}}, /* Linear mapping. */ + .port_width = 5, }; static const struct mtk_iommu_plat_data mt8183_data = { @@ -1071,6 +1078,7 @@ static const struct mtk_iommu_plat_data mt8183_data = { .iova_region = single_domain, .iova_region_nr = ARRAY_SIZE(single_domain), .larbid_remap = {{0}, {4}, {5}, {6}, {7}, {2}, {3}, {1}}, + .port_width = 5, }; static const struct mtk_iommu_plat_data mt8192_data = { @@ -1082,6 +1090,7 @@ static const struct mtk_iommu_plat_data mt8192_data = { .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), .larbid_remap = {{0}, {1}, {4, 5}, {7}, {2}, {9, 11, 19, 20}, {0, 14, 16}, {0, 13, 18, 17}}, + .port_width = 5, }; static const struct of_device_id mtk_iommu_of_ids[] = { diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index b742432220c5..84cecaf6d61c 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -54,6 +54,7 @@ struct mtk_iommu_plat_data { enum mtk_iommu_plat m4u_plat; u32 flags; u32 inv_sel_reg; + u8 port_width; unsigned int iova_region_nr; const struct mtk_iommu_iova_region *iova_region; -- 2.36.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu