Re: [PATCH v3 4/6] arm64: dts: mediatek: mt2712e: Add mediatek, infracfg phandle for IOMMU

From: Miles Chen via iommu <iommu@lists.linux-foundation.org>
To: <angelogioacchino.delregno@collabora.com>
Cc: devicetree@vger.kernel.org, krzysztof.kozlowski@linaro.org,
	linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
	robh+dt@kernel.org, linux-mediatek@lists.infradead.org,
	krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com,
	will@kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 4/6] arm64: dts: mediatek: mt2712e: Add mediatek, infracfg phandle for IOMMU
Date: Fri, 10 Jun 2022 02:08:45 +0800	[thread overview]
Message-ID: <20220609180845.31195-1-miles.chen@mediatek.com> (raw)
In-Reply-To: <20220609100802.54513-5-angelogioacchino.delregno@collabora.com>

> The IOMMU driver now looks for the "mediatek,infracfg" phandle as a
> new way to retrieve a syscon to that:
> even though the old way is retained, it has been deprecated and the
> driver will write a message in kmsg advertising to use the phandle
> way instead.
> 
> For this reason, assign the right phandle to mediatek,infracfg in
> the iommu node.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Reviewed-by: Miles Chen <miles.chen@mediatek.com> 

> ---
>  arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> index 623eb3beabf2..4797537cb368 100644
> --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> @@ -329,6 +329,7 @@ iommu0: iommu@10205000 {
>  		interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_LOW>;
>  		clocks = <&infracfg CLK_INFRA_M4U>;
>  		clock-names = "bclk";
> +		mediatek,infracfg = <&infracfg>;
>  		mediatek,larbs = <&larb0>, <&larb1>, <&larb2>,
>  				 <&larb3>, <&larb6>;
>  		#iommu-cells = <1>;
> @@ -346,6 +347,7 @@ iommu1: iommu@1020a000 {
>  		interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_LOW>;
>  		clocks = <&infracfg CLK_INFRA_M4U>;
>  		clock-names = "bclk";
> +		mediatek,infracfg = <&infracfg>;
>  		mediatek,larbs = <&larb4>, <&larb5>, <&larb7>;
>  		#iommu-cells = <1>;
>  	};
> -- 
> 2.35.1
> 
> 
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