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Wed, 29 Jun 2022 20:50:59 +0800 Received: from mbjsdccf07.mediatek.inc (10.15.20.246) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Wed, 29 Jun 2022 20:50:58 +0800 To: Subject: Re: [PATCH v10 1/2] iommu/io-pgtable-arm-v7s: Add a quirk to allow pgtable PA up to 35bit Date: Wed, 29 Jun 2022 20:44:03 +0800 Message-ID: <20220629124403.18122-1-yf.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <1ce1947984043bc4284abe94b53888c11a072345.camel@mediatek.com> References: <1ce1947984043bc4284abe94b53888c11a072345.camel@mediatek.com> MIME-Version: 1.0 X-MTK: N Cc: isaacm@codeaurora.org, miles.chen@mediatek.com, wsd_upstream@mediatek.com, will@kernel.org, linux-kernel@vger.kernel.org, Libo.Kang@mediatek.com, iommu@lists.linux-foundation.org, yf.wang@mediatek.com, linux-mediatek@lists.infradead.org, ning.li@mediatek.com, matthias.bgg@gmail.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: "yf.wang--- via iommu" Reply-To: yf.wang@mediatek.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Wed, 2022-06-22 at 09:28 +0800, Yong Wu wrote: > On Thu, 2022-06-16 at 20:07 +0800, yf.wang@mediatek.com wrote: > > From: Yunfei Wang > > > > Single memory zone feature will remove ZONE_DMA32 and ZONE_DMA and > > cause pgtable PA size larger than 32bit. > > > > Since Mediatek IOMMU hardware support at most 35bit PA in pgtable, > > so add a quirk to allow the PA of pgtables support up to bit35. > > > > Signed-off-by: Ning Li > > Signed-off-by: Yunfei Wang > > --- > > drivers/iommu/io-pgtable-arm-v7s.c | 67 +++++++++++++++++++++++--- > > -- > > -- > > include/linux/io-pgtable.h | 15 ++++--- > > 2 files changed, 63 insertions(+), 19 deletions(-) > > [...] > > > /* TTBR */ > > - cfg->arm_v7s_cfg.ttbr = virt_to_phys(data->pgd) | > > ARM_V7S_TTBR_S | > > + paddr = virt_to_phys(data->pgd); > > + cfg->arm_v7s_cfg.ttbr = paddr | ARM_V7S_TTBR_S | > > (cfg->coherent_walk ? (ARM_V7S_TTBR_NOS > > > > > > > ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_WBW > > A) | > > ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_WBW > > A)) : > > (ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_NC) > > > > > > > ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_NC) > > )); > > + > > + if (cfg->quirks & IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT) > > + cfg->arm_v7s_cfg.ttbr = (paddr & GENMASK(31, 7)) | > > + upper_32_bits(paddr); > > If we keep ttbr u32, we have to put the special logic here. This line > is ok for all the MediaTek cases, not only for this quirk. It means: > > if (arm_v7s_is_mtk_enabled(cfg)) > cfg->arm_v7s_cfg.ttbr = (virt_to_phys(data->pgd) & > GENMASK(31, 7)) | upper_32_bits(paddr); > else > xxx > > Then we don't need add "& MMU_PT_ADDR_MASK" in mtk_iommu.c since > you have done it here. > Hi Yong, Thanks for your suggestion, PATCH v11 version will modify it. Thanks, Yunfei. > > + > > return &data->iop; > > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu