From: Sam Protsenko <semen.protsenko@linaro.org>
To: Marek Szyprowski <m.szyprowski@samsung.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Janghyuck Kim <janghyuck.kim@samsung.com>,
Cho KyongHo <pullip.cho@samsung.com>,
Daniel Mentz <danielmentz@google.com>,
David Virag <virag.david003@gmail.com>,
Sumit Semwal <sumit.semwal@linaro.org>,
iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 6/6] iommu/exynos: Enable default VM instance on SysMMU v7
Date: Thu, 14 Jul 2022 19:55:50 +0300 [thread overview]
Message-ID: <20220714165550.8884-7-semen.protsenko@linaro.org> (raw)
In-Reply-To: <20220714165550.8884-1-semen.protsenko@linaro.org>
In order to enable SysMMU v7 with VM register layout, at least the
default VM instance (n=0) must be enabled, in addition to enabling the
SysMMU itself. To do so, add corresponding write to MMU_CTRL_VM[0]
register, before writing to MMU_CTRL register.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
Changes in v3:
- Reworked for using plain writel()
- Added Marek's Acked-by tag
Changes in v2:
- Extracted VM enabling code to the separate function
- Used new SysMMU read/write functions to access the registers
drivers/iommu/exynos-iommu.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index fc9ef3ff0057..8e18984a0c4f 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -135,6 +135,8 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
#define CFG_SYSSEL (1 << 22) /* System MMU 3.2 only */
#define CFG_FLPDCACHE (1 << 20) /* System MMU 3.2+ only */
+#define CTRL_VM_ENABLE BIT(0)
+#define CTRL_VM_FAULT_MODE_STALL BIT(3)
#define CAPA0_CAPA1_EXIST BIT(11)
#define CAPA1_VCR_ENABLED BIT(14)
@@ -163,6 +165,7 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
/* v7.x registers */
#define REG_V7_CAPA0 0x870
#define REG_V7_CAPA1 0x874
+#define REG_V7_CTRL_VM 0x8000
#define has_sysmmu(dev) (dev_iommu_priv_get(dev) != NULL)
@@ -548,6 +551,18 @@ static void __sysmmu_init_config(struct sysmmu_drvdata *data)
writel(cfg, data->sfrbase + REG_MMU_CFG);
}
+static void __sysmmu_enable_vid(struct sysmmu_drvdata *data)
+{
+ u32 ctrl;
+
+ if (MMU_MAJ_VER(data->version) < 7 || !data->has_vcr)
+ return;
+
+ ctrl = readl(data->sfrbase + REG_V7_CTRL_VM);
+ ctrl |= CTRL_VM_ENABLE | CTRL_VM_FAULT_MODE_STALL;
+ writel(ctrl, data->sfrbase + REG_V7_CTRL_VM);
+}
+
static void __sysmmu_enable(struct sysmmu_drvdata *data)
{
unsigned long flags;
@@ -558,6 +573,7 @@ static void __sysmmu_enable(struct sysmmu_drvdata *data)
writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
__sysmmu_init_config(data);
__sysmmu_set_ptbase(data, data->pgtable);
+ __sysmmu_enable_vid(data);
writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
data->active = true;
spin_unlock_irqrestore(&data->lock, flags);
--
2.30.2
next prev parent reply other threads:[~2022-07-14 16:56 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 16:55 [PATCH v3 0/6] iommu/exynos: Add basic support for SysMMU v7 Sam Protsenko
2022-07-14 16:55 ` [PATCH v3 1/6] iommu/exynos: Reuse SysMMU constants for page size and order Sam Protsenko
2022-07-14 16:55 ` [PATCH v3 2/6] iommu/exynos: Handle failed IOMMU device registration properly Sam Protsenko
2022-07-14 16:55 ` [PATCH v3 3/6] iommu/exynos: Set correct dma mask for SysMMU v5+ Sam Protsenko
2022-07-14 16:55 ` [PATCH v3 4/6] iommu/exynos: Abstract non-common registers on different variants Sam Protsenko
2022-07-15 12:14 ` Robin Murphy
2022-07-15 12:44 ` Sam Protsenko
2022-07-14 16:55 ` [PATCH v3 5/6] iommu/exynos: Add SysMMU v7 register set Sam Protsenko
2022-07-15 7:28 ` Marek Szyprowski
2022-07-15 12:52 ` Sam Protsenko
2022-07-14 16:55 ` Sam Protsenko [this message]
2022-07-15 8:31 ` [PATCH v3 0/6] iommu/exynos: Add basic support for SysMMU v7 Joerg Roedel
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