From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C518B4693 for ; Wed, 20 Jul 2022 12:35:42 +0000 (UTC) X-UUID: e4b85534e7e149eaa69d035d9ac276dc-20220720 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:d48e5a90-86c0-4fda-bb57-c8b1bc6f6482,OB:0,LO B:30,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,AC TION:release,TS:95 X-CID-INFO: VERSION:1.1.8,REQID:d48e5a90-86c0-4fda-bb57-c8b1bc6f6482,OB:0,LOB: 30,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,AC TION:quarantine,TS:95 X-CID-META: VersionHash:0f94e32,CLOUDID:4edfffd7-5d6d-4eaf-a635-828a3ee48b7c,C OID:a1f4ac43e810,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:nil,BEC:nil,COL:0 X-UUID: e4b85534e7e149eaa69d035d9ac276dc-20220720 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 806991958; Wed, 20 Jul 2022 20:30:28 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Wed, 20 Jul 2022 20:30:27 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 20 Jul 2022 20:30:26 +0800 From: Tinghan Shen To: Yong Wu , Joerg Roedel , "Will Deacon" , Robin Murphy , Rob Herring , Krzysztof Kozlowski , Lee Jones , Matthias Brugger , Tinghan Shen , AngeloGioacchino Del Regno , MandyJH Liu CC: , , , , , , Trevor Wu Subject: [PATCH v3 18/21] arm64: dts: mt8195: Specify audio reset controller Date: Wed, 20 Jul 2022 20:30:20 +0800 Message-ID: <20220720123023.13500-19-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220720123023.13500-1-tinghan.shen@mediatek.com> References: <20220720123023.13500-1-tinghan.shen@mediatek.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N From: Trevor Wu Specify audio reset controller for audio hardware resetting. Signed-off-by: Trevor Wu Signed-off-by: Tinghan Shen Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 54d8d26dd2e4..08e6ae5ce40f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -680,6 +680,7 @@ "mediatek,mt6589-wdt"; mediatek,disable-extrst; reg = <0 0x10007000 0 0x100>; + #reset-cells = <1>; }; apmixedsys: syscon@1000c000 { @@ -782,6 +783,8 @@ mediatek,topckgen = <&topckgen>; power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>; interrupts = ; + resets = <&watchdog 14>; + reset-names = "audiosys"; clocks = <&clk26m>, <&apmixedsys CLK_APMIXED_APLL1>, <&apmixedsys CLK_APMIXED_APLL2>, -- 2.18.0