Linux IOMMU Development
 help / color / mirror / Atom feed
From: Michael Shavit <mshavit@google.com>
To: Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	 Joerg Roedel <joro@8bytes.org>
Cc: Michael Shavit <mshavit@google.com>,
	jean-philippe@linaro.org, nicolinc@nvidia.com,  jgg@nvidia.com,
	baolu.lu@linux.intel.com,  linux-arm-kernel@lists.infradead.org,
	iommu@lists.linux.dev,  linux-kernel@vger.kernel.org
Subject: [PATCH v2 03/18] iommu/arm-smmu-v3: Refactor write_strtab_ent
Date: Tue,  6 Jun 2023 20:07:39 +0800	[thread overview]
Message-ID: <20230606120854.4170244-4-mshavit@google.com> (raw)
In-Reply-To: <20230606120854.4170244-1-mshavit@google.com>

Explicity keep track of the s1_cfg and s2_cfg that are attached to a
master in arm_smmu_master, regardless of whether they are owned by
arm_smmu_master, arm_smmu_domain or userspace.

Signed-off-by: Michael Shavit <mshavit@google.com>
---
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 37 +++++++++------------
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h |  2 ++
 2 files changed, 17 insertions(+), 22 deletions(-)

diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 023769f5ca79a..d79c6ef5d6ed4 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -1269,10 +1269,9 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
 	 */
 	u64 val = le64_to_cpu(dst[0]);
 	bool ste_live = false;
-	struct arm_smmu_device *smmu = NULL;
+	struct arm_smmu_device *smmu = master->smmu;
 	struct arm_smmu_s1_cfg *s1_cfg = NULL;
 	struct arm_smmu_s2_cfg *s2_cfg = NULL;
-	struct arm_smmu_domain *smmu_domain = NULL;
 	struct arm_smmu_cmdq_ent prefetch_cmd = {
 		.opcode		= CMDQ_OP_PREFETCH_CFG,
 		.prefetch	= {
@@ -1280,24 +1279,10 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
 		},
 	};
 
-	if (master) {
-		smmu_domain = master->domain;
-		smmu = master->smmu;
-	}
-
-	if (smmu_domain) {
-		switch (smmu_domain->stage) {
-		case ARM_SMMU_DOMAIN_S1:
-			s1_cfg = &smmu_domain->s1_cfg;
-			break;
-		case ARM_SMMU_DOMAIN_S2:
-		case ARM_SMMU_DOMAIN_NESTED:
-			s2_cfg = &smmu_domain->s2_cfg;
-			break;
-		default:
-			break;
-		}
-	}
+	if (master->s1_cfg)
+		s1_cfg = master->s1_cfg;
+	else if (master->s2_cfg)
+		s2_cfg = master->s2_cfg;
 
 	if (val & STRTAB_STE_0_V) {
 		switch (FIELD_GET(STRTAB_STE_0_CFG, val)) {
@@ -1319,8 +1304,8 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
 	val = STRTAB_STE_0_V;
 
 	/* Bypass/fault */
-	if (!smmu_domain || !(s1_cfg || s2_cfg)) {
-		if (!smmu_domain && disable_bypass)
+	if (!(s1_cfg || s2_cfg)) {
+		if (disable_bypass)
 			val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_ABORT);
 		else
 			val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_BYPASS);
@@ -2401,6 +2386,8 @@ static void arm_smmu_detach_dev(struct arm_smmu_master *master)
 
 	master->domain = NULL;
 	master->ats_enabled = false;
+	master->s1_cfg = NULL;
+	master->s2_cfg = NULL;
 	arm_smmu_install_ste_for_dev(master);
 }
 
@@ -2454,6 +2441,12 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
 	}
 
 	master->domain = smmu_domain;
+	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
+		master->s1_cfg = &smmu_domain->s1_cfg;
+	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2 ||
+		   smmu_domain->stage == ARM_SMMU_DOMAIN_NESTED) {
+		master->s2_cfg = &smmu_domain->s2_cfg;
+	}
 
 	/*
 	 * The SMMU does not support enabling ATS with bypass. When the STE is
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index 053cc14c23969..3c614fbe2b8b9 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -689,6 +689,8 @@ struct arm_smmu_master {
 	struct list_head		domain_head;
 	struct arm_smmu_stream		*streams;
 	struct arm_smmu_s1_cfg		owned_s1_cfg;
+	struct arm_smmu_s1_cfg		*s1_cfg;
+	struct arm_smmu_s2_cfg		*s2_cfg;
 	unsigned int			num_streams;
 	bool				ats_enabled;
 	bool				stall_enabled;
-- 
2.41.0.rc0.172.g3f132b7071-goog


  parent reply	other threads:[~2023-06-06 12:09 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-06 12:07 [PATCH v2 00/18] Add PASID support to SMMUv3 unmanaged domains Michael Shavit
2023-06-06 12:07 ` [PATCH v2 01/18] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg Michael Shavit
2023-06-06 12:07 ` [PATCH v2 02/18] iommu/arm-smmu-v3: Add smmu_s1_cfg to smmu_master Michael Shavit
2023-06-06 12:07 ` Michael Shavit [this message]
2023-06-06 12:07 ` [PATCH v2 04/18] iommu/arm-smmu-v3: Refactor write_ctx_desc Michael Shavit
2023-06-06 12:07 ` [PATCH v2 05/18] iommu/arm-smmu-v3: Use the master-owned s1_cfg Michael Shavit
2023-06-06 12:07 ` [PATCH v2 06/18] iommu/arm-smmu-v3: Simplify arm_smmu_enable_ats Michael Shavit
2023-06-06 12:07 ` [PATCH v2 07/18] iommu/arm-smmu-v3: Keep track of attached ssids Michael Shavit
2023-06-06 12:07 ` [PATCH v2 08/18] iommu/arm-smmu-v3: Add helper for atc invalidation Michael Shavit
2023-06-06 12:07 ` [PATCH v2 09/18] iommu/arm-smmu-v3: Implement set_dev_pasid Michael Shavit
2023-06-06 12:07 ` [PATCH v2 10/18] iommu/arm-smmu-v3-sva: Remove bond refcount Michael Shavit
2023-06-06 12:07 ` [PATCH v2 11/18] iommu/arm-smmu-v3-sva: Clean unused iommu_sva Michael Shavit
2023-06-06 12:07 ` [PATCH v2 12/18] iommu/arm-smmu-v3-sva: Remove arm_smmu_bond Michael Shavit
2023-06-06 12:07 ` [PATCH v2 13/18] iommu/arm-smmu-v3-sva: Add check when enabling sva Michael Shavit
2023-06-06 12:07 ` [PATCH v2 14/18] iommu/arm-smmu-v3: Support domains with shared CDs Michael Shavit
2023-06-06 17:09   ` Jason Gunthorpe
2023-06-06 18:36     ` Michael Shavit
2023-06-07 11:59       ` Jason Gunthorpe
2023-06-08  2:39         ` Baolu Lu
2023-06-08 13:39           ` Jason Gunthorpe
2023-06-09  1:44             ` Baolu Lu
2023-06-14  9:17         ` Michael Shavit
2023-06-14  9:43           ` Michael Shavit
2023-06-14  9:57           ` Robin Murphy
2023-06-14 12:10           ` Jason Gunthorpe
2023-06-14 13:30             ` Michael Shavit
2023-06-14 13:35               ` Jason Gunthorpe
2023-07-05  9:56         ` Zhang, Tina
2023-07-10 16:55           ` Jason Gunthorpe
2023-07-11  0:26             ` Zhang, Tina
2023-07-11 13:53               ` Jason Gunthorpe
2023-06-06 12:07 ` [PATCH v2 15/18] iommu/arm-smmu-v3: Allow more re-use for SVA Michael Shavit
2023-06-06 12:07 ` [PATCH v2 16/18] iommu/arm-smmu-v3-sva: Attach S1_SHARED_CD domain Michael Shavit
2023-06-06 12:07 ` [PATCH v2 17/18] iommu/arm-smmu-v3-sva: Alloc notifier for {smmu,mn} Michael Shavit
2023-06-06 12:07 ` [PATCH v2 18/18] iommu/arm-smmu-v3-sva: Remove atc_inv_domain_ssid Michael Shavit

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230606120854.4170244-4-mshavit@google.com \
    --to=mshavit@google.com \
    --cc=baolu.lu@linux.intel.com \
    --cc=iommu@lists.linux.dev \
    --cc=jean-philippe@linaro.org \
    --cc=jgg@nvidia.com \
    --cc=joro@8bytes.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=nicolinc@nvidia.com \
    --cc=robin.murphy@arm.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox