From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4C7B7F for ; Fri, 7 Jul 2023 01:35:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688693701; x=1720229701; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=w9KMIa9FeqUiMJ7hHb6xqUyUsuqFNPtVvcMNCNqbITA=; b=YBp/TkGNbvvUfW95TUSywl1jB/MT3fSuzbYJjS6vjZ5iENKxmvDiYVMV AsffmE/WAjmoTTxYunt71QKnhOWY1aTvAZdaSSN6nYPlRJpR5DuKEr0He DqRAxu2MgkGFO0gTKxfltlVE2eZbKToIJNUs7mMy1LISQ/La9tvBSv2Hg KETUvya5BM9j1iFHugNv/PTFh4tHN2F2g6dbfXJvaMJ5K0zTLmWSNT1rS DURrZsmNA0lyLyrH61Ijcoo7RewjkZS1AGiY37O4htuLcT+zEQsGyXbVY U5jHES+Uo3Wwknnjpbmms5iaBltbJPBi5vrVKXRE8ew+6WR6/G5qx4qnN w==; X-IronPort-AV: E=McAfee;i="6600,9927,10763"; a="429832246" X-IronPort-AV: E=Sophos;i="6.01,187,1684825200"; d="scan'208";a="429832246" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2023 18:35:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10763"; a="893791292" X-IronPort-AV: E=Sophos;i="6.01,187,1684825200"; d="scan'208";a="893791292" Received: from fengj-mobl.ccr.corp.intel.com (HELO tinazhan-desk1.www.tendawifi.com) ([10.254.210.124]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2023 18:34:58 -0700 From: Tina Zhang To: Jason Gunthorpe , Kevin Tian , Joerg Roedel , Will Deacon , Lu Baolu , Michael Shavit Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Tina Zhang Subject: [RFC PATCH 1/6] iommu: Add two pasid helper functions Date: Fri, 7 Jul 2023 09:34:36 +0800 Message-Id: <20230707013441.365583-2-tina.zhang@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230707013441.365583-1-tina.zhang@intel.com> References: <20230707013441.365583-1-tina.zhang@intel.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit mm_get_pasid() is for getting mm pasid value and mm_set_pasid() is for setting mm pasid value. The motivation is to replace mm->pasid with an iommu private data structure that is introduced in a later patch. Signed-off-by: Tina Zhang --- arch/x86/kernel/traps.c | 2 +- include/linux/iommu.h | 14 ++++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 58b1f208eff51..8587461c43664 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -678,7 +678,7 @@ static bool try_fixup_enqcmd_gp(void) if (!mm_valid_pasid(current->mm)) return false; - pasid = current->mm->pasid; + pasid = mm_get_pasid(current->mm); /* * Did this thread already have its PASID activated? diff --git a/include/linux/iommu.h b/include/linux/iommu.h index e8c9a7da10609..d39e647219eb8 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -1174,6 +1174,15 @@ static inline bool mm_valid_pasid(struct mm_struct *mm) { return mm->pasid != IOMMU_PASID_INVALID; } +static inline u32 mm_get_pasid(struct mm_struct *mm) +{ + return mm->pasid; +} + +static inline void mm_set_pasid(struct mm_struct *mm, u32 pasid) +{ + mm->pasid = pasid; +} void mm_pasid_drop(struct mm_struct *mm); struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm); @@ -1196,6 +1205,11 @@ static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle) } static inline void mm_pasid_init(struct mm_struct *mm) {} static inline bool mm_valid_pasid(struct mm_struct *mm) { return false; } +static inline u32 mm_get_pasid(struct mm_struct *mm) +{ + return IOMMU_PASID_INVALID; +} +static inline void mm_set_pasid(struct mm_struct *mm, u32 pasid) {} static inline void mm_pasid_drop(struct mm_struct *mm) {} #endif /* CONFIG_IOMMU_SVA */ -- 2.34.1