Linux IOMMU Development
 help / color / mirror / Atom feed
From: Vasant Hegde <vasant.hegde@amd.com>
To: <iommu@lists.linux.dev>, <joro@8bytes.org>
Cc: <suravee.suthikulpanit@amd.com>, <wei.huang2@amd.com>,
	<jsnitsel@redhat.com>, <jgg@ziepe.ca>,
	Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH 10/11] iommu/amd/iommu_v2: Add support to switch default domain to SVA mode
Date: Tue, 8 Aug 2023 10:02:31 +0000	[thread overview]
Message-ID: <20230808100232.5977-11-vasant.hegde@amd.com> (raw)
In-Reply-To: <20230808100232.5977-1-vasant.hegde@amd.com>

Current iommu_v2 module allocates a secondary domain every time a
device driver calls amd_iommu_init_device(). Then it detaches all
devices in the group from the default domain, and reattaches to the
new domain. Finally it configures V2API mode.

Previous patch added support to switch same domain to SVA mode. Use
these new interfaces to enable SVA mode.

Note that even with this change, PASID is managed by device driver. This
imposes restriction where there can be only one SVA enabled device per
IOMMU group (same as current behaviour).

Finally remove unused functions.

Co-developed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
 drivers/iommu/amd/amd_iommu.h |  2 --
 drivers/iommu/amd/iommu.c     | 37 ----------------------
 drivers/iommu/amd/iommu_v2.c  | 59 +++++++----------------------------
 3 files changed, 12 insertions(+), 86 deletions(-)

diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h
index f5a9697488f8..2ec335ac0b1c 100644
--- a/drivers/iommu/amd/amd_iommu.h
+++ b/drivers/iommu/amd/amd_iommu.h
@@ -72,8 +72,6 @@ int amd_iommu_v2api_gcr3_uninit(struct pci_dev *pdev);
 
 int amd_iommu_register_ppr_notifier(struct notifier_block *nb);
 int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);
-void amd_iommu_domain_direct_map(struct iommu_domain *dom);
-int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
 int amd_iommu_flush_page(struct protection_domain *domain, u32 pasid, u64 address);
 void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
 void amd_iommu_domain_update(struct protection_domain *domain);
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index b56d1e624cf6..77b87511e085 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2725,43 +2725,6 @@ int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb)
 }
 EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier);
 
-void amd_iommu_domain_direct_map(struct iommu_domain *dom)
-{
-	struct protection_domain *domain = to_pdomain(dom);
-	unsigned long flags;
-
-	spin_lock_irqsave(&domain->lock, flags);
-
-	if (domain->iop.pgtbl_cfg.tlb)
-		free_io_pgtable_ops(&domain->iop.iop.ops);
-
-	spin_unlock_irqrestore(&domain->lock, flags);
-}
-EXPORT_SYMBOL(amd_iommu_domain_direct_map);
-
-int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids)
-{
-	struct protection_domain *pdom = to_pdomain(dom);
-	unsigned long flags;
-	int ret;
-
-	spin_lock_irqsave(&pdom->lock, flags);
-
-	/*
-	 * Save us all sanity checks whether devices already in the
-	 * domain support IOMMUv2. Just force that the domain has no
-	 * devices attached when it is switched into IOMMUv2 mode.
-	 */
-	ret = -EBUSY;
-	if (pdom->dev_cnt > 0 || pdom->flags & PD_IOMMUV2_MASK)
-		goto out;
-
-out:
-	spin_unlock_irqrestore(&pdom->lock, flags);
-	return ret;
-}
-EXPORT_SYMBOL(amd_iommu_domain_enable_v2);
-
 static int __flush_pasid(struct protection_domain *domain, u32 pasid,
 			 u64 address, bool size)
 {
diff --git a/drivers/iommu/amd/iommu_v2.c b/drivers/iommu/amd/iommu_v2.c
index 8453b2d9d27b..f05bd9156c8d 100644
--- a/drivers/iommu/amd/iommu_v2.c
+++ b/drivers/iommu/amd/iommu_v2.c
@@ -111,9 +111,6 @@ static struct device_state *get_device_state(u32 sbdf)
 
 static void free_device_state(struct device_state *dev_state)
 {
-	struct iommu_group *group;
-	struct iommu_domain *domain = &dev_state->pdom->domain;
-
 	/* Get rid of any remaining pasid states */
 	free_pasid_states(dev_state);
 
@@ -123,20 +120,8 @@ static void free_device_state(struct device_state *dev_state)
 	 */
 	wait_event(dev_state->wq, !atomic_read(&dev_state->count));
 
-	/*
-	 * First detach device from domain - No more PRI requests will arrive
-	 * from that device after it is unbound from the IOMMUv2 domain.
-	 */
-	group = iommu_group_get(&dev_state->pdev->dev);
-	if (WARN_ON(!group))
-		return;
-
-	iommu_detach_group(domain, group);
-
-	iommu_group_put(group);
-
-	/* Everything is down now, free the IOMMUv2 domain */
-	iommu_domain_free(domain);
+	amd_iommu_v2api_gcr3_uninit(dev_state->pdev);
+	amd_iommu_v2api_domain_uninit(dev_state->pdom);
 
 	/* Finally get rid of the device-state */
 	kfree(dev_state);
@@ -735,9 +720,7 @@ EXPORT_SYMBOL(amd_iommu_unbind_pasid);
 
 int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
 {
-	struct iommu_domain *domain;
 	struct device_state *dev_state;
-	struct iommu_group *group;
 	unsigned long flags;
 	int ret, tmp;
 	u32 sbdf;
@@ -774,6 +757,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
 	init_waitqueue_head(&dev_state->wq);
 	dev_state->pdev  = pdev;
 	dev_state->sbdf = sbdf;
+	dev_state->pdom = dev_data->domain;
 
 	tmp = pasids;
 	for (dev_state->pasid_levels = 0; (tmp - 1) & ~0x1ff; tmp >>= 9)
@@ -787,39 +771,20 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
 	if (dev_state->states == NULL)
 		goto out_free_dev_state;
 
-	domain = iommu_domain_alloc(&pci_bus_type);
-	if (domain == NULL)
+	ret = amd_iommu_v2api_domain_init(dev_data->domain);
+	if (ret)
 		goto out_free_states;
 
-	/* Retrieve new protection_domain that has just been allocated */
-	dev_state->pdom = to_pdomain(domain);
-
-	/* See iommu_is_default_domain() */
-	domain->type = IOMMU_DOMAIN_IDENTITY;
-	amd_iommu_domain_direct_map(&dev_state->pdom->domain);
-
-	ret = amd_iommu_domain_enable_v2(domain, pasids);
+	ret = amd_iommu_v2api_gcr3_init(pdev, pasids);
 	if (ret)
-		goto out_free_domain;
-
-	group = iommu_group_get(&pdev->dev);
-	if (!group) {
-		ret = -EINVAL;
-		goto out_free_domain;
-	}
-
-	ret = iommu_attach_group(domain, group);
-	if (ret != 0)
-		goto out_drop_group;
-
-	iommu_group_put(group);
+		goto out_uninit_domain;
 
 	spin_lock_irqsave(&state_lock, flags);
 
 	if (__get_device_state(sbdf) != NULL) {
 		spin_unlock_irqrestore(&state_lock, flags);
 		ret = -EBUSY;
-		goto out_free_domain;
+		goto out_uninit_gcr3;
 	}
 
 	list_add_tail(&dev_state->list, &state_list);
@@ -828,11 +793,11 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
 
 	return 0;
 
-out_drop_group:
-	iommu_group_put(group);
+out_uninit_gcr3:
+	amd_iommu_v2api_gcr3_uninit(dev_state->pdev);
 
-out_free_domain:
-	iommu_domain_free(domain);
+out_uninit_domain:
+	amd_iommu_v2api_domain_uninit(dev_state->pdom);
 
 out_free_states:
 	free_page((unsigned long)dev_state->states);
-- 
2.31.1


  parent reply	other threads:[~2023-08-08 10:08 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-08 10:02 [PATCH 00/11] iommu/amd: SVA support (part 2) - refactor support for GCR3 table Vasant Hegde
2023-08-08 10:02 ` [PATCH 01/11] iommu/amd: Rename helper function rlookup_amd_iommu() Vasant Hegde
2023-08-08 15:28   ` Jason Gunthorpe
2023-08-10 23:06     ` Suthikulpanit, Suravee
2023-08-11 13:06       ` Jason Gunthorpe
2023-08-08 10:02 ` [PATCH 02/11] iommu/amd: Introduce struct protection_domain.pd_mode Vasant Hegde
2023-08-08 15:30   ` Jason Gunthorpe
2023-08-11 10:04     ` Vasant Hegde
2023-08-11 13:21       ` Jason Gunthorpe
2023-08-08 10:02 ` [PATCH 03/11] iommu/amd: Introduce per-device GCR3 table Vasant Hegde
2023-08-08 15:32   ` Jason Gunthorpe
2023-08-10 23:31     ` Suthikulpanit, Suravee
2023-08-08 10:02 ` [PATCH 04/11] iommu/amd: Use protection_domain.flags to check page table mode Vasant Hegde
2023-08-08 15:35   ` Jason Gunthorpe
2023-08-11 10:10     ` Vasant Hegde
2023-08-08 10:02 ` [PATCH 05/11] iommu/amd: Refactor helper function for setting / clearing GCR3 Vasant Hegde
2023-08-08 10:02 ` [PATCH 06/11] iommu/amd: Refactor helper function for attaching / detaching device Vasant Hegde
2023-08-08 15:39   ` Jason Gunthorpe
2023-08-11 10:07     ` Vasant Hegde
2023-08-11 13:20       ` Jason Gunthorpe
2023-08-11 16:50         ` Vasant Hegde
2023-08-11 23:50           ` Jason Gunthorpe
2023-08-15  4:19             ` Tian, Kevin
2023-08-15  5:33             ` Suthikulpanit, Suravee
2023-08-15 11:42               ` Jason Gunthorpe
2023-08-08 10:02 ` [PATCH 07/11] iommu/amd: Refactor protection_domain helper functions Vasant Hegde
2023-08-08 10:02 ` [PATCH 08/11] iommu/amd: Refactor GCR3 table " Vasant Hegde
2023-08-08 10:02 ` [PATCH 09/11] iommu/amd: Introduce helper functions for AMD IOMMU v2 driver Vasant Hegde
2023-08-08 15:49   ` Jason Gunthorpe
2023-08-11  1:34     ` Suthikulpanit, Suravee
2023-08-11 13:17       ` Jason Gunthorpe
2023-08-11 16:51         ` Suthikulpanit, Suravee
2023-08-08 10:02 ` Vasant Hegde [this message]
2023-08-08 15:51   ` [PATCH 10/11] iommu/amd/iommu_v2: Add support to switch default domain to SVA mode Jason Gunthorpe
2023-08-08 10:02 ` [PATCH 11/11] iommu/amd: Remove unused GCR3 table parameters from struct protection_domain Vasant Hegde

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230808100232.5977-11-vasant.hegde@amd.com \
    --to=vasant.hegde@amd.com \
    --cc=iommu@lists.linux.dev \
    --cc=jgg@ziepe.ca \
    --cc=joro@8bytes.org \
    --cc=jsnitsel@redhat.com \
    --cc=suravee.suthikulpanit@amd.com \
    --cc=wei.huang2@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox