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Tue, 16 Jan 2024 10:58:06 -0600 From: Vasant Hegde To: , CC: , , , , Vasant Hegde , Jason Gunthorpe Subject: [PATCH v5 16/17] iommu/amd: Rearrange device flush code Date: Tue, 16 Jan 2024 16:53:34 +0000 Message-ID: <20240116165335.6043-17-vasant.hegde@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240116165335.6043-1-vasant.hegde@amd.com> References: <20240116165335.6043-1-vasant.hegde@amd.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0FB:EE_|DM4PR12MB6616:EE_ X-MS-Office365-Filtering-Correlation-Id: 1cbb5b0d-7bad-4887-046c-08dc16b45197 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ngFhZAvbvW7YKEEZkjjPgWTvdJ4Jwo8mnOh4ikb3T/ZmTbp7IpVbjeeILopuMkklaVT2CIRDLwuDbD6bHCUpzNa1IBYWpXwf6U/ByvDYNmqMgeGIf+XYT72BBvV7JL8FdYaBOFaqwCCIk0SjpdepzghGu0V3LhVw8TYgIg1FR6HNEMMFqt1Cr2Kd3ldxvnat0wMwaa0tOEdU980JKKiZnQBVdnGn0y0RCxPyPlWbKr3xKnpzAbqg/PejJSga0vnh7ta+W4dLYYhRmov+AXNkO6y3omcKV9Lbmjff7gvjOJbSnwu3UVMOk3m8S3gHfhz/PxKVvGIcakHGEPpCHCV8GhhgHU/RdzqACG6jU8mG66AkR6e+c/7aLaimWu3i6pFKUUrZd3l2lEFOsD0X06+DADjKwnZ7EmrQk78lnE3b5DwjDtRo89/FhkKTCgXWvVeySJ4OJO3yECs9H6xIicQ+Ai3IPH+8s63GgZ50AMW2YIYqUSa0mWVoGzp1vuVPoXH+hQUMZPIY0xjFKt1C5up4KnlN5xocO86wkxJKYdoQiPC+a1BlcFihaXOc9eW0c/49frJGbuT/rEWa2A09yn0au89iuuEdP2/fQ37aOQguBNNJlBy6SgmgSUx6v0tRX8+EHFwqGU13gnVWpbbiy1AOmMDJJ9dr9YBzu/mOXY5AcI6PjMuUSi1AzDKJGckv+STsw1xbLZcW9Nvd9HyNFsfwVLmA5+7Mh9PyBZfSJOJyMPvrRWiU6Uoqz2fNITYHhY5Nx0hB+ileAxyg0sZTZ/SZJw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(376002)(346002)(396003)(39860400002)(230922051799003)(1800799012)(451199024)(64100799003)(82310400011)(186009)(36840700001)(40470700004)(46966006)(2616005)(26005)(336012)(16526019)(83380400001)(1076003)(426003)(41300700001)(44832011)(47076005)(40480700001)(40460700003)(36756003)(82740400003)(86362001)(5660300002)(36860700001)(2906002)(316002)(54906003)(110136005)(8936002)(8676002)(70206006)(4326008)(70586007)(356005)(6666004)(81166007)(7696005)(478600001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jan 2024 16:58:09.6982 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1cbb5b0d-7bad-4887-046c-08dc16b45197 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6616 Consolidate all flush related code in one place so that its easy to maintain. No functional changes intended. Signed-off-by: Vasant Hegde Reviewed-by: Jason Gunthorpe --- drivers/iommu/amd/iommu.c | 92 ++++++++++++++++++--------------------- 1 file changed, 43 insertions(+), 49 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index ac81872ce5c0..6e7436787c45 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -1649,6 +1649,49 @@ static void domain_flush_devices(struct protection_domain *domain) device_flush_dte(dev_data); } +static void update_device_table(struct protection_domain *domain) +{ + struct iommu_dev_data *dev_data; + + list_for_each_entry(dev_data, &domain->dev_list, list) { + struct amd_iommu *iommu = rlookup_amd_iommu(dev_data->dev); + + set_dte_entry(iommu, dev_data); + clone_aliases(iommu, dev_data->dev); + } +} + +void amd_iommu_update_and_flush_device_table(struct protection_domain *domain) +{ + update_device_table(domain); + domain_flush_devices(domain); +} + +void amd_iommu_domain_update(struct protection_domain *domain) +{ + /* Update device table */ + amd_iommu_update_and_flush_device_table(domain); + + /* Flush domain TLB(s) and wait for completion */ + amd_iommu_domain_flush_all(domain); +} + +int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid, + int status, int tag) +{ + struct iommu_dev_data *dev_data; + struct amd_iommu *iommu; + struct iommu_cmd cmd; + + dev_data = dev_iommu_priv_get(&pdev->dev); + iommu = get_amd_iommu_from_dev(&pdev->dev); + + build_complete_ppr(&cmd, dev_data->devid, pasid, status, + tag, dev_data->pri_tlp); + + return iommu_queue_command(iommu, &cmd); +} + /**************************************************************************** * * The next functions belong to the domain allocation. A domain is @@ -2173,39 +2216,6 @@ static struct iommu_group *amd_iommu_device_group(struct device *dev) return acpihid_device_group(dev); } -/***************************************************************************** - * - * The next functions belong to the dma_ops mapping/unmapping code. - * - *****************************************************************************/ - -static void update_device_table(struct protection_domain *domain) -{ - struct iommu_dev_data *dev_data; - - list_for_each_entry(dev_data, &domain->dev_list, list) { - struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data); - - set_dte_entry(iommu, dev_data); - clone_aliases(iommu, dev_data->dev); - } -} - -void amd_iommu_update_and_flush_device_table(struct protection_domain *domain) -{ - update_device_table(domain); - domain_flush_devices(domain); -} - -void amd_iommu_domain_update(struct protection_domain *domain) -{ - /* Update device table */ - amd_iommu_update_and_flush_device_table(domain); - - /* Flush domain TLB(s) and wait for completion */ - amd_iommu_domain_flush_all(domain); -} - /***************************************************************************** * * The following functions belong to the exported interface of AMD IOMMU @@ -2804,22 +2814,6 @@ const struct iommu_ops amd_iommu_ops = { } }; -int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid, - int status, int tag) -{ - struct iommu_dev_data *dev_data; - struct amd_iommu *iommu; - struct iommu_cmd cmd; - - dev_data = dev_iommu_priv_get(&pdev->dev); - iommu = get_amd_iommu_from_dev(&pdev->dev); - - build_complete_ppr(&cmd, dev_data->devid, pasid, status, - tag, dev_data->pri_tlp); - - return iommu_queue_command(iommu, &cmd); -} - #ifdef CONFIG_IRQ_REMAP /***************************************************************************** -- 2.31.1