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[142.68.80.239]) by smtp.gmail.com with ESMTPSA id bs39-20020a05620a472700b00783f82a9376sm107956qkb.16.2024.02.01.12.20.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Feb 2024 12:20:08 -0800 (PST) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1rVdXb-00AotI-Ow; Thu, 01 Feb 2024 16:20:07 -0400 Date: Thu, 1 Feb 2024 16:20:07 -0400 From: Jason Gunthorpe To: Vasant Hegde Cc: iommu@lists.linux.dev, joro@8bytes.org, suravee.suthikulpanit@amd.com, wei.huang2@amd.com, jsnitsel@redhat.com Subject: Re: [PATCH v5 07/14] iommu/amd: Add support for page response Message-ID: <20240201202007.GR50608@ziepe.ca> References: <20240118073339.6978-1-vasant.hegde@amd.com> <20240118073339.6978-8-vasant.hegde@amd.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240118073339.6978-8-vasant.hegde@amd.com> On Thu, Jan 18, 2024 at 07:33:32AM +0000, Vasant Hegde wrote: > diff --git a/drivers/iommu/amd/ppr.c b/drivers/iommu/amd/ppr.c > index 1eb0b737afb5..b1751eb495fd 100644 > --- a/drivers/iommu/amd/ppr.c > +++ b/drivers/iommu/amd/ppr.c > @@ -148,3 +148,18 @@ void amd_iommu_iopf_uninit(struct amd_iommu *iommu) > > raw_spin_unlock_irqrestore(&iommu->lock, flags); > } > + > +int amd_iommu_page_response(struct device *dev, > + struct iopf_fault *evt, > + struct iommu_page_response *resp) > +{ > + struct pci_dev *pdev; > + > + if (!dev || !dev_is_pci(dev)) > + return -ENODEV; > + > + pdev = to_pci_dev(dev); > + > + return amd_iommu_complete_ppr(pdev, resp->pasid, resp->code, > + resp->grpid); Converting this to a pci_dev seems pointless? Nothing reaches into the PCI struct. Why do it? We don't need sanity checking here on the fast path.. Jason