From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: LKML <linux-kernel@vger.kernel.org>, X86 Kernel <x86@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
iommu@lists.linux.dev, Thomas Gleixner <tglx@linutronix.de>,
"Lu Baolu" <baolu.lu@linux.intel.com>,
kvm@vger.kernel.org, Dave Hansen <dave.hansen@intel.com>,
Joerg Roedel <joro@8bytes.org>, "H. Peter Anvin" <hpa@zytor.com>,
"Borislav Petkov" <bp@alien8.de>,
"Ingo Molnar" <mingo@redhat.com>
Cc: Paul Luse <paul.e.luse@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Jens Axboe <axboe@kernel.dk>, Raj Ashok <ashok.raj@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
maz@kernel.org, seanjc@google.com,
"Robin Murphy" <robin.murphy@arm.com>,
jim.harris@samsung.com, a.manzanares@samsung.com,
"Bjorn Helgaas" <helgaas@kernel.org>,
guang.zeng@intel.com, robert.hoo.linux@gmail.com,
oliver.sang@intel.com, acme@kernel.org,
Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: [PATCH v3 04/12] x86/irq: Add a Kconfig option for posted MSI
Date: Tue, 23 Apr 2024 10:41:06 -0700 [thread overview]
Message-ID: <20240423174114.526704-5-jacob.jun.pan@linux.intel.com> (raw)
In-Reply-To: <20240423174114.526704-1-jacob.jun.pan@linux.intel.com>
This option will be used to support delivering MSIs as posted
interrupts. Interrupt remapping is required.
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
---
v2: Remove x2apic dependency
---
arch/x86/Kconfig | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 4474bf32d0a4..fed22fc66217 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -464,6 +464,17 @@ config X86_X2APIC
If you don't know what to do here, say N.
+config X86_POSTED_MSI
+ bool "Enable MSI and MSI-x delivery by posted interrupts"
+ depends on X86_64 && IRQ_REMAP
+ help
+ This enables MSIs that are under interrupt remapping to be delivered as
+ posted interrupts to the host kernel. Interrupt throughput can
+ potentially be improved by coalescing CPU notifications during high
+ frequency bursts.
+
+ If you don't know what to do here, say N.
+
config X86_MPPARSE
bool "Enable MPS table" if ACPI
default y
--
2.25.1
next prev parent reply other threads:[~2024-04-23 17:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-23 17:41 [PATCH v3 00/12] Coalesced Interrupt Delivery with posted MSI Jacob Pan
2024-04-23 17:41 ` [PATCH v3 01/12] KVM: VMX: Move posted interrupt descriptor out of vmx code Jacob Pan
2024-04-23 17:41 ` [PATCH v3 02/12] x86/irq: Unionize PID.PIR for 64bit access w/o casting Jacob Pan
2024-04-23 17:41 ` [PATCH v3 03/12] x86/irq: Remove bitfields in posted interrupt descriptor Jacob Pan
2024-05-01 7:29 ` Oliver Sang
2024-04-23 17:41 ` Jacob Pan [this message]
2024-04-23 17:41 ` [PATCH v3 05/12] x86/irq: Reserve a per CPU IDT vector for posted MSIs Jacob Pan
2024-04-23 17:41 ` [PATCH v3 06/12] x86/irq: Set up per host CPU posted interrupt descriptors Jacob Pan
2024-04-23 17:41 ` [PATCH v3 07/12] x86/irq: Factor out calling ISR from common_interrupt Jacob Pan
2024-04-23 17:41 ` [PATCH v3 08/12] x86/irq: Install posted MSI notification handler Jacob Pan
2024-04-23 17:41 ` [PATCH v3 09/12] x86/irq: Factor out common code for checking pending interrupts Jacob Pan
2024-04-23 17:41 ` [PATCH v3 10/12] x86/irq: Extend checks for pending vectors to posted interrupts Jacob Pan
2024-04-23 17:41 ` [PATCH v3 11/12] iommu/vt-d: Make posted MSI an opt-in cmdline option Jacob Pan
2024-04-23 17:41 ` [PATCH v3 12/12] iommu/vt-d: Enable posted mode for device MSIs Jacob Pan
2025-11-24 10:48 ` [PATCH v3 00/12] Coalesced Interrupt Delivery with posted MSI Luigi Rizzo
2025-11-24 18:59 ` Thomas Gleixner
2025-11-24 22:40 ` Luigi Rizzo
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