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AJvYcCWrri/U5D1m3wFpiYhe6/kOiDflJbIkNtKkefbL3TZ9+GCpJTs/qQvsSQjsSuwIqJxwcB+91XpT0i3fskUu+4vuEWA62rk= X-Gm-Message-State: AOJu0Yxg08XjkKalpvxjH7jHr+vdvDSvpzmRciamOycUhdpP6EAKt+TR lCgINfXtkXKerurJq8j3kKsH3E0r2lC/F3nCU1gMOMSXiBRL2xS9mrXM4+lNBOU= X-Google-Smtp-Source: AGHT+IFyT+2cX3CUvKGm2EXv4WIaX+r6Q5SkjvFFmDYOtCk8+G42oZ2PPreRy/IsRw9tSFPb0TzkOw== X-Received: by 2002:a05:6000:a88:b0:34c:e62a:db70 with SMTP id ffacd0b85a97d-3504aa63447mr17873757f8f.67.1715844901762; Thu, 16 May 2024 00:35:01 -0700 (PDT) Received: from myrica ([2.221.137.100]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fe004eae9sm244071795e9.1.2024.05.16.00.35.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 May 2024 00:35:01 -0700 (PDT) Date: Thu, 16 May 2024 08:35:00 +0100 From: Jean-Philippe Brucker To: Bjorn Helgaas Cc: Vidya Sagar , "will@kernel.org" , "lpieralisi@kernel.org" , "kw@linux.com" , "robh@kernel.org" , "bhelgaas@google.com" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "liviu.dudau@arm.com" , "sudeep.holla@arm.com" , "joro@8bytes.org" , "robin.murphy@arm.com" , Nicolin Chen , Ketan Patil , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "iommu@lists.linux.dev" , "devicetree@vger.kernel.org" Subject: Re: [PATCH 0/3] Enable PCIe ATS for devicetree boot Message-ID: <20240516073500.GA3563602@myrica> References: <20240515185241.GA2131384@bhelgaas> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240515185241.GA2131384@bhelgaas> Hi, On Wed, May 15, 2024 at 01:52:41PM -0500, Bjorn Helgaas wrote: > On Wed, May 15, 2024 at 06:28:15PM +0000, Vidya Sagar wrote: > > Thanks, Jean for this series. > > May I know the current status of it? > > Although it was actively reviewed, I see that its current status is set to > > 'Handled Elsewhere' in https://patchwork.kernel.org/project/linux-pci/list/?series=848836&state=* > > What is the plan to get this series accepted? > > I probably marked it "handled elsewhere" in the PCI patchwork because > it doesn't touch PCI files (the binding has already been reviewed by > Rob and Liviu), so I assumed the iommu folks would take the series. > I don't know how they track patches. Yes I think this can go through the IOMMU tree. Since patch 3 is still missing an Ack, I'm resendng the series next cycle. Thanks, Jean > > The merge window is open now, so likely they would wait until the next > cycle so it would have some time in linux-next, but that's up to them.