From: Jason Gunthorpe <jgg@ziepe.ca>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: Lu Baolu <baolu.lu@linux.intel.com>,
Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] iommu/vt-d: Refactor PCI PRI enabling/disabling callbacks
Date: Wed, 26 Jun 2024 10:49:29 -0300 [thread overview]
Message-ID: <20240626134929.GW791043@ziepe.ca> (raw)
In-Reply-To: <BN9PR11MB5276E8767AB63378C81130528CD62@BN9PR11MB5276.namprd11.prod.outlook.com>
On Wed, Jun 26, 2024 at 06:53:04AM +0000, Tian, Kevin wrote:
> btw in concept PRI will not be enabled/disabled when there are
> PASIDs of this device being actively attached.
Please don't bake such an assumption in.
non-PRI paging domains can be attached to a PASID and should not
enable PRI.
PRI is enabled when the first PRI domain is attached to a RID/PASID
and disabled when the last PRI domain is detached.
Jason
prev parent reply other threads:[~2024-06-26 13:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-06 3:40 [PATCH] iommu/vt-d: Refactor PCI PRI enabling/disabling callbacks Lu Baolu
2024-06-26 6:53 ` Tian, Kevin
2024-06-26 13:05 ` Baolu Lu
2024-06-27 0:00 ` Tian, Kevin
2024-06-26 13:49 ` Jason Gunthorpe [this message]
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