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AJvYcCUsoW0gSfXSD41DdA3QD2QR/n/GEkwyT6yAepMh/+zKJKrtNh8q8x9EJb5kIgF8V1Qp8RIVmJDzkKADyyIiRzDDB1oRWmA= X-Gm-Message-State: AOJu0Yw0DCfKwDiUyWC0FRFKys4zIFhQBKQ6lIgtzOMzeCYm87tzcAvY RYgG4VIoys9/Znuq5Au0pGfhbpSTYGaQ0DBc/zOVTEoxmzs8RsZO27noEbpTJG4= X-Google-Smtp-Source: AGHT+IHRz1SHHY+TmlIy6IZBZFwaBFuAJ4rZWriiRFCwuK0Ao+rNzMBXMsAGPD3T1rYs7tmFaCwRjQ== X-Received: by 2002:a05:6808:159c:b0:3d6:324b:ddc7 with SMTP id 5614622812f47-3d6b35ca407mr8326356b6e.28.1719818963388; Mon, 01 Jul 2024 00:29:23 -0700 (PDT) Received: from J9GPGXL7NT.bytedance.net ([61.213.176.58]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70803ecf757sm5779337b3a.104.2024.07.01.00.29.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 01 Jul 2024 00:29:23 -0700 (PDT) From: Xu Lu To: tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, paul.walmsley@sifive.com Cc: palmer@dabbelt.com, aou@eecs.berkeley.edu, apatel@ventanamicro.com, sunilvl@ventanamicro.com, iommu@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux@rivosinc.com, baolu.lu@linux.intel.com, lihangjing@bytedance.com, xieyongji@bytedance.com, Xu Lu Subject: [PATCH 1/1] iommu/riscv: Support sharing irq lines between iommu queues Date: Mon, 1 Jul 2024 15:29:08 +0800 Message-Id: <20240701072908.25503-2-luxu.kernel@bytedance.com> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20240701072908.25503-1-luxu.kernel@bytedance.com> References: <20240701072908.25503-1-luxu.kernel@bytedance.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit When the number of wired interrupt lines is less than the number of iommu queues, we should assign one irq line for several queues and configure csr icvec accordingly. Signed-off-by: Xu Lu --- drivers/iommu/riscv/iommu-platform.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/iommu/riscv/iommu-platform.c b/drivers/iommu/riscv/iommu-platform.c index da336863f152..1d0af1260d5b 100644 --- a/drivers/iommu/riscv/iommu-platform.c +++ b/drivers/iommu/riscv/iommu-platform.c @@ -60,6 +60,10 @@ static int riscv_iommu_platform_probe(struct platform_device *pdev) for (vec = 0; vec < iommu->irqs_count; vec++) iommu->irqs[vec] = platform_get_irq(pdev, vec); + for (vec = iommu->irqs_count; vec < RISCV_IOMMU_INTR_COUNT; vec++) + iommu->irqs[vec] = platform_get_irq(pdev, + (vec % iommu->irqs_count)); + /* Enable wire-signaled interrupts, fctl.WSI */ if (!(iommu->fctl & RISCV_IOMMU_FCTL_WSI)) { iommu->fctl |= RISCV_IOMMU_FCTL_WSI; -- 2.20.1