Re: [PATCH RFCv2] iommu: Add domain type and flag to domain_alloc_paging()

[Jason Gunthorpe <jgg@ziepe.ca>]

On Wed, Aug 14, 2024 at 02:38:58AM +0000, Tian, Kevin wrote:

> > Flags = 0 means the domain cannot be attached to a PASID
> > Flags = 0 means the domain cannot be attached to the RID while PASID
> > is in use
> 
> From my understanding there are only two type of formats so far:
> 
>   - a format only working with RID (V1 in AMD, S2 in ARM)
>   - a format working with both RID and PASID (V2 in AMD, S1 in ARM,
>    S1/S2 in Intel)
> 
> With that in mind we only need one bit to indicate whether a domain
> allows PASID attach. The user learns the PASID capability via
> GET_HW_INFO and should set or clear the PASID flag consistently
> for all non-nesting domains attached to a same device (RID, or RID+PASID).
> 
> for AMD/ARM this consistency is mandatory as one device can only be
> configured to a single format. no mix.
> 
> for Intel there's more flexibility but I don't see a reason to mix S1/S2
> between RID and PASID, and now both are fixed to S2 for UNMANAGED.
> 
> > 
> > The core code should enforce this rule always.
> > 
> > Above that we minimally need
> > 
> > Flags = IOMMU_HWPT_ALLOC_PASID allows the domain to be attached to a
> > PASID
> > 
> > And you need to decide if the RID usage is bundled with the above as
> > well.
> 
> A single bit IOMMU_HWPT_ALLOC_PASID is what I meant. Setting it
> means the domain can be attached to both RID and PASID, i.e. RID
> attach is always implied.

OK, lets try it like that then

I also know of no HW that would need it to be different on the RID

Jason