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[142.68.128.5]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6cde1366d96sm7430546d6.126.2024.10.18.07.27.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 07:27:27 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1t1nws-008DaC-L8; Fri, 18 Oct 2024 11:27:26 -0300 Date: Fri, 18 Oct 2024 11:27:26 -0300 From: Jason Gunthorpe To: Vasant Hegde Cc: iommu@lists.linux.dev, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, suravee.suthikulpanit@amd.com, yi.l.liu@intel.com, baolu.lu@linux.intel.com, kevin.tian@intel.com, jacob.pan@linux.microsoft.com Subject: Re: [PATCH v3 09/12] iommu/amd: Enhance amd_iommu_domain_alloc_user() Message-ID: <20241018142726.GL948948@ziepe.ca> References: <20241017140137.6028-1-vasant.hegde@amd.com> <20241017140137.6028-10-vasant.hegde@amd.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241017140137.6028-10-vasant.hegde@amd.com> On Thu, Oct 17, 2024 at 02:01:34PM +0000, Vasant Hegde wrote: > Previous patch enhanced core layer to check device PASID capability and > pass right flags to ops->domain_alloc_user(). > > Enhance amd_iommu_domain_alloc_user() to allocate domain with > appropriate page table based on flags parameter. > - If flag is empty then allocate domain with default page table type. > This will eventually replace ops->domain_alloc(). > For UNMANAGED domain, core will call this interface with flags=0. So > AMD driver will continue to allocate V1 page table. > > - If IOMMU_HWPT_ALLOC_PASID flag is passed then allocate domain with v2 > page table. > > Signed-off-by: Vasant Hegde > --- > drivers/iommu/amd/iommu.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c > index cb6a72564c23..87eff85c0c23 100644 > --- a/drivers/iommu/amd/iommu.c > +++ b/drivers/iommu/amd/iommu.c > @@ -2404,6 +2404,20 @@ amd_iommu_domain_alloc_user(struct device *dev, u32 flags, > { > unsigned int type = IOMMU_DOMAIN_UNMANAGED; > > + /* Allocate domain with default page table */ > + if (!flags) { > + return do_iommu_domain_alloc(IOMMU_DOMAIN_DMA, > + dev, 0, amd_iommu_pgtable); > + } Extra {} ? > + /* Allocate domain with v2 page table if IOMMU supports PASID. */ > + if (flags & IOMMU_HWPT_ALLOC_PASID) { > + if (!amd_iommu_pasid_supported()) > + return ERR_PTR(-EINVAL); Depending on what we decide this could be amd_iommu_v2_pgtbl_supported() Reviewed-by: Jason Gunthorpe Jason