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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SJ1PEPF0000231F.mail.protection.outlook.com (10.167.242.235) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8114.16 via Frontend Transport; Mon, 28 Oct 2024 09:38:38 +0000 Received: from kali.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 28 Oct 2024 04:38:34 -0500 From: Vasant Hegde To: , CC: , , , , , , , , Vasant Hegde Subject: [PATCH v5 00/12] iommu: Domain allocation enhancements Date: Mon, 28 Oct 2024 09:37:58 +0000 Message-ID: <20241028093810.5901-1-vasant.hegde@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF0000231F:EE_|BL3PR12MB6569:EE_ X-MS-Office365-Filtering-Correlation-Id: 7d7f442e-7a59-4a32-93d1-08dcf7344d04 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2024 09:38:38.0710 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d7f442e-7a59-4a32-93d1-08dcf7344d04 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF0000231F.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6569 This series adds iommu_paging_domain_alloc_flags() which takes flags to pass additional details for domain allocation (like domain with PASID support). Also adjusts core code to handler variuos domain allocations. Also updates AMD IOMMU driver domain allocation code. With this by default it will allocate domain with V2 page table for PASID capable device and v1 page table for rest of the devices. Thanks everyone who reviewed previous version and provided valuable feedbacks. This series is based on top of v6.12-rc3. This is also available at github : https://github.com/AMDESE/linux-iommu/tree/iommu_paging_domain_v5 Changes from v4 -> v5: - Updated amd_iommu_domain_alloc_user() - Added Review-by tags V4 : https://lore.kernel.org/linux-iommu/20241023104207.5894-1-vasant.hegde@amd.com/T/#t Changes from v3 -> v4: - Added Review-by tags - Updated Patch3 to handle -EOPNOTSUPP and allocate non-PASID domain - Updated amd_iommu_domain_alloc_user() to do flags check first - Few other minor fixes based on review comment V3 : https://lore.kernel.org/linux-iommu/20241017140137.6028-1-vasant.hegde@amd.com/T/#t Changes from V2 -> v3: - Added Review-by tags - Fixed warnings reported by 0-DAY CI - Added patch to enhance arm_smmu_domain_alloc_user() to support IOMMU_HWPT_ALLOC_PASID flag - Added new patch to check GIOSUP/GTSUP - Added patch to move V2 page table check to early_amd_iommu_init() - Added patch to adjust blocked/identity domain allocation in core layer - Dropped "iommu/amd: Add iommu_ops->domain_alloc_paging support" V2 : https://lore.kernel.org/linux-iommu/20240911101911.6269-1-vasant.hegde@amd.com/T/#t Changes from v1 -> v2: - Rebased on top of iommu/next - Split patches into smaller patches - Added global static identity domain support V1 : https://lore.kernel.org/linux-iommu/20240821133554.7405-1-vasant.hegde@amd.com/ RFC v2: https://lore.kernel.org/linux-iommu/fc8715e4-fb44-433b-a42a-7804118ebc57@amd.com/T/#t RFC v1 : https://lore.kernel.org/linux-iommu/7e249bc6-c578-40f0-aca7-835149a0ad39@amd.com/ Jason Gunthorpe (5): iommu: Refactor __iommu_domain_alloc() iommu: Introduce iommu_paging_domain_alloc_flags() iommu: Add new flag to explictly request PASID capable domain iommu: Put domain allocation in __iommu_group_alloc_blocking_domain() iommu: Create __iommu_alloc_identity_domain() Vasant Hegde (7): iommu/arm-smmu-v3: Enhance domain_alloc_user() to allocate PASID capable domain iommu/amd: Add helper function to check GIOSUP/GTSUP iommu/amd: Move V2 page table support check to early_amd_iommu_init() iommu/amd: Separate page table setup from domain allocation iommu/amd: Pass page table type as param to pdom_setup_pgtable() iommu/amd: Enhance amd_iommu_domain_alloc_user() iommu/amd: Implement global identity domain drivers/iommu/amd/amd_iommu.h | 8 +- drivers/iommu/amd/init.c | 18 +- drivers/iommu/amd/iommu.c | 141 ++++++++++----- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +- drivers/iommu/iommu.c | 186 ++++++++++++++------ include/linux/iommu.h | 14 +- include/uapi/linux/iommufd.h | 8 + 7 files changed, 270 insertions(+), 111 deletions(-) -- 2.31.1