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[142.68.128.5]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7be6148931bsm446023485a.65.2025.01.20.06.26.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jan 2025 06:26:44 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1tZsjj-00000003PkA-2hgf; Mon, 20 Jan 2025 10:26:43 -0400 Date: Mon, 20 Jan 2025 10:26:43 -0400 From: Jason Gunthorpe To: Shyam Saini Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, virtualization@lists.linux.dev, will@kernel.org, jacob.pan@linux.microsoft.com, eric.auger@redhat.com, code@tyhicks.com, eahariha@linux.microsoft.com, vijayb@linux.microsoft.com Subject: Re: [PATCH 0/3] make MSI IOVA base address and its length configurable Message-ID: <20250120142643.GM674319@ziepe.ca> References: <20250116232307.1436693-1-shyamsaini@linux.microsoft.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250116232307.1436693-1-shyamsaini@linux.microsoft.com> On Thu, Jan 16, 2025 at 03:23:04PM -0800, Shyam Saini wrote: > Hi, > > Currently, the MSI_IOVA_BASE address is hard-coded to 0x80000000, > assuming that all platforms have this address available for MSI IOVA > reservation. However, this is not always the case, as some platforms > reserve this address for other purposes. Can you explain this some more? This address is in the kernel controlled IOVA space, there are few ways a platform can impact this. How is the platform impacting it? Is the non-functional IOVA always reflected in the iommu_get_resv_regions()? Why not avoid this conflict in your platform software? > There was an [1] attempt to fix this problem by passing the MSI IOVA > base as a kernel command line parameter. Yuk > In the previous attempt, > Will suggested reserving the MSI IOVA at runtime whenever there is a > conflict with the default MSI_IOVA_BASE. However, dynamically reserving > this address has debuggability concerns, as it becomes difficult to > track IOMMU mapping failures. Still, this approach seems like the best to me.. > This patch series aims to address the issue by introducing a new DTS > property, "arm,smmu-pci-msi-iova-data". This property allows the > configuration of MSI IOVA with a custom MSI base address and a custom > length for IOMMU/SMMU drivers. It accommodates platforms that do not > have the default MSI base address available for MSI reservation. My understand was using DT to set kernel configurables was frowned upon? Ultimately MSI_IOVA_BASE is an arbitary choice by kernel software. Jason