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[142.167.219.86]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-47790ef0976sm57062041cf.59.2025.04.01.09.11.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 09:11:39 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1tzeDC-00000001ML9-3rkm; Tue, 01 Apr 2025 13:11:38 -0300 Date: Tue, 1 Apr 2025 13:11:38 -0300 From: Jason Gunthorpe To: Alexey Kardashevskiy Cc: x86@kernel.org, kvm@vger.kernel.org, linux-crypto@vger.kernel.org, linux-pci@vger.kernel.org, linux-arch@vger.kernel.org, Sean Christopherson , Paolo Bonzini , Tom Lendacky , Ashish Kalra , Joerg Roedel , Suravee Suthikulpanit , Robin Murphy , Kevin Tian , Bjorn Helgaas , Dan Williams , Christoph Hellwig , Nikunj A Dadhania , Michael Roth , Vasant Hegde , Joao Martins , Nicolin Chen , Lu Baolu , Steve Sistare , Lukas Wunner , Jonathan Cameron , Suzuki K Poulose , Dionna Glaze , Yi Liu , iommu@lists.linux.dev, linux-coco@lists.linux.dev, Zhi Wang , AXu Yilun , "Aneesh Kumar K . V" Subject: Re: [RFC PATCH v2 13/22] iommufd: amd-iommu: Add vdevice support Message-ID: <20250401161138.GL186258@ziepe.ca> References: <20250218111017.491719-1-aik@amd.com> <20250218111017.491719-14-aik@amd.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250218111017.491719-14-aik@amd.com> On Tue, Feb 18, 2025 at 10:10:00PM +1100, Alexey Kardashevskiy wrote: > @@ -939,6 +939,7 @@ struct iommu_fault_alloc { > enum iommu_viommu_type { > IOMMU_VIOMMU_TYPE_DEFAULT = 0, > IOMMU_VIOMMU_TYPE_ARM_SMMUV3 = 1, > + IOMMU_VIOMMU_TYPE_TSM = 2, This should probably be some kind of AMD_TSM and the driver data blob should carry any additional data needed to create the vIOMMU that is visible to the guest. > @@ -2068,7 +2069,18 @@ static void set_dte_entry(struct amd_iommu *iommu, > new.data[1] |= DTE_FLAG_IOTLB; > > old_domid = READ_ONCE(dte->data[1]) & DEV_DOMID_MASK; > - new.data[1] |= domid; > + > + if (domain->aviommu) { AMD should be implementing viommu natively without CC as well, try to structure things so it fits together better. This should only trigger for the CC viommu type.. > + /* > + * This runs when VFIO is bound to a device but TDI is not yet. > + * Ideally TSM should change DTE only when TDI is bound. > + */ > + dev_info(dev_data->dev, "Skip DomainID=%x and set bit96\n", domid); > + new.data[1] |= 1ULL << (96 - 64); > + } else { > + dev_info(dev_data->dev, "Not skip DomainID=%x and not set bit96\n", domid); > + new.data[1] |= domid; > + } > > /* > * Restore cached persistent DTE bits, which can be set by information > @@ -2549,12 +2561,15 @@ amd_iommu_domain_alloc_paging_flags(struct device *dev, u32 flags, > { > struct amd_iommu *iommu = get_amd_iommu_from_dev(dev); > const u32 supported_flags = IOMMU_HWPT_ALLOC_DIRTY_TRACKING | > + IOMMU_HWPT_ALLOC_PASID | > + IOMMU_HWPT_ALLOC_NEST_PARENT; > + const u32 supported_flags2 = IOMMU_HWPT_ALLOC_DIRTY_TRACKING | > IOMMU_HWPT_ALLOC_PASID; Just ignore NEST_PARENT? That seems wrong, it should force a V1 page table?? > +static struct iommufd_viommu *amd_viommu_alloc(struct device *dev, > + struct iommu_domain *parent, > + struct iommufd_ctx *ictx, > + unsigned int viommu_type) > +{ > + struct amd_viommu *aviommu; > + struct protection_domain *domain = to_pdomain(parent); > + > + if (viommu_type != IOMMU_VIOMMU_TYPE_TSM) > + return ERR_PTR(-EOPNOTSUPP); > + > + aviommu = iommufd_viommu_alloc(ictx, struct amd_viommu, core, &amd_viommu_ops); > + if (IS_ERR(aviommu)) > + return ERR_CAST(aviommu); > + > + aviommu->domain = domain; This is not OK, the parent domain of the viommu can be used with multiple viommu objects, it can't just have a naked back reference like this. You can get 1:1 domain objects linked to the viommu by creating the 'S1' type domains, maybe that is what you want here. A special domain type that is TSM that has a special DTE. Though I'd really rather see the domain attach logic and DTE formation in the AMD driver be fixed up before we made it more complex :\ It would be nice to see normal nesting and viommu support first too :\ Jason