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From: Jason Gunthorpe <jgg@nvidia.com>
To: Alex Williamson <alex.williamson@redhat.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	linux-pci@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>,
	Lu Baolu <baolu.lu@linux.intel.com>,
	galshalom@nvidia.com, Joerg Roedel <jroedel@suse.de>,
	Kevin Tian <kevin.tian@intel.com>,
	kvm@vger.kernel.org, maorg@nvidia.com, patches@lists.linux.dev,
	tdave@nvidia.com, Tony Zhu <tony.zhu@intel.com>
Subject: Re: [PATCH 03/11] iommu: Compute iommu_groups properly for PCIe switches
Date: Tue, 1 Jul 2025 22:04:07 -0300	[thread overview]
Message-ID: <20250702010407.GB1051729@nvidia.com> (raw)
In-Reply-To: <20250701132905.67d29191.alex.williamson@redhat.com>

On Tue, Jul 01, 2025 at 01:29:05PM -0600, Alex Williamson wrote:
> On Mon, 30 Jun 2025 19:28:33 -0300
> Jason Gunthorpe <jgg@nvidia.com> wrote:
> > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> > index d265de874b14b6..f4584ffacbc03d 100644
> > --- a/drivers/iommu/iommu.c
> > +++ b/drivers/iommu/iommu.c
> > @@ -65,8 +65,16 @@ struct iommu_group {
> >  	struct list_head entry;
> >  	unsigned int owner_cnt;
> >  	void *owner;
> > +
> > +	/* Used by the device_group() callbacks */
> > +	u32 bus_data;
> >  };
> >  
> > +/*
> > + * Everything downstream of this group should share it.
> > + */
> > +#define BUS_DATA_PCI_UNISOLATED BIT(0)
> 
> NON_ISOLATED for consistency w/ enum from the previous patch?

Yes

> > -	/* No shared group found, allocate new */
> > -	return iommu_group_alloc();
> > +	switch (pci_bus_isolated(pdev->bus)) {
> > +	case PCIE_ISOLATED:
> > +		/* Check multi-function groups and same-bus devfn aliases */
> > +		group = pci_get_alias_group(pdev);
> > +		if (group)
> > +			return group;
> > +
> > +		/* No shared group found, allocate new */
> > +		return iommu_group_alloc();
> 
> I'm not following how we'd handle a multi-function root port w/o
> consistent ACS isolation here.  How/where does the resulting group get
> the UNISOLATED flag set?

Still wobbly on the root port/root bus.. So the answer is probably
that it doesn't.

What does a multi-function root port with different ACS flags even
mean and how should we treat it? I had in mind that the first root
port is the TA and immediately goes the IOMMU.

If you can explain a bit more about how you see the root ports working
I can try to make an implementation.

AFAICT the spec sort of says 'implementation defined' for ACS on root
ports??

Thanks,
Jason

  reply	other threads:[~2025-07-02  1:04 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-30 22:28 [PATCH 00/11] Fix incorrect iommu_groups with PCIe switches Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 01/11] PCI: Move REQ_ACS_FLAGS into pci_regs.h as PCI_ACS_ISOLATED Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 02/11] PCI: Add pci_bus_isolation() Jason Gunthorpe
2025-07-01 19:28   ` Alex Williamson
2025-07-02  1:00     ` Jason Gunthorpe
2025-07-03 15:30     ` Jason Gunthorpe
2025-07-03 22:17       ` Alex Williamson
2025-07-03 23:08         ` Alex Williamson
2025-07-03 23:21           ` Jason Gunthorpe
2025-07-03 23:15         ` Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 03/11] iommu: Compute iommu_groups properly for PCIe switches Jason Gunthorpe
2025-07-01 19:29   ` Alex Williamson
2025-07-02  1:04     ` Jason Gunthorpe [this message]
2025-07-17 19:25       ` Donald Dutile
2025-07-17 20:27         ` Jason Gunthorpe
2025-07-18  2:31           ` Donald Dutile
2025-07-18 13:32             ` Jason Gunthorpe
2025-09-22 22:32               ` Alex Williamson
2025-09-22 23:15                 ` Jason Gunthorpe
2025-09-23  0:51                   ` Donald Dutile
2025-09-23  1:17                     ` Alex Williamson
2025-09-23  1:10                   ` Alex Williamson
2025-09-23  2:26                     ` Donald Dutile
2025-09-23  2:50                       ` Alex Williamson
2025-09-23 12:32                         ` Jason Gunthorpe
2025-09-23 12:58                           ` Alex Williamson
2025-09-23 13:03                     ` Jason Gunthorpe
2025-09-23 21:29                       ` Alex Williamson
2025-09-25 12:20                         ` Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 04/11] iommu: Organize iommu_group by member size Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 05/11] PCI: Add pci_reachable_set() Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 06/11] iommu: Use pci_reachable_set() in pci_device_group() Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 07/11] iommu: Validate that pci_for_each_dma_alias() matches the groups Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 08/11] PCI: Add the ACS Enhanced Capability definitions Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 09/11] PCI: Enable ACS Enhanced bits for enable_acs and config_acs Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 10/11] PCI: Check ACS DSP/USP redirect bits in pci_enable_pasid() Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 11/11] PCI: Check ACS Extended flags for pci_bus_isolated() Jason Gunthorpe
2025-07-01 21:48 ` [PATCH 00/11] Fix incorrect iommu_groups with PCIe switches Alex Williamson
2025-07-02  1:47   ` Jason Gunthorpe
2025-07-04  0:37   ` Jason Gunthorpe
2025-07-11 14:55     ` Alex Williamson
2025-07-11 16:08       ` Jason Gunthorpe
2025-07-08 20:47   ` Jason Gunthorpe
2025-07-11 15:40     ` Alex Williamson
2025-07-11 16:14       ` Jason Gunthorpe

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