Re: [PATCH v3 1/1] iommu/sva: Invalidate KVA range on kernel TLB flush

[Jason Gunthorpe <jgg@nvidia.com>]

On Wed, Aug 06, 2025 at 08:03:42AM -0700, Dave Hansen wrote:
> Hold on a sec, though. the problematic caller of this looks something
> like this (logically):
> 
> 	pmd_free_pte_page()
> 	{
> 	        pte = pmd_page_vaddr(*pmd);
> 	        pmd_clear(pmd);
> 		flush_tlb_kernel_range(...); // does schedule_work()
> 		pte_free_kernel(pte);
> 	}
> 
> It _immediately_ frees the PTE page. The schedule_work() work will
> probably happen sometime after the page is freed.
> 
> Isn't that still a use-after-free? It's for some arbitrary amount of
> time and better than before but it's still a use-after-free.

Yes it is.

You can't do this approach without also pushing the pages to freed on
a list and defering the free till the work. This is broadly what the
normal mm user flow is doing..

Jason