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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by DS3PEPF000099DF.mail.protection.outlook.com (10.167.17.202) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9203.9 via Frontend Transport; Thu, 9 Oct 2025 23:58:13 +0000 Received: from purico-ed03host.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Thu, 9 Oct 2025 16:58:08 -0700 From: Suravee Suthikulpanit To: , CC: , , , , , , , , , , , , , , , , , , Suravee Suthikulpanit Subject: [PATCH v3 00/15] iommu/amd: Introduce Nested Translation support Date: Thu, 9 Oct 2025 23:57:40 +0000 Message-ID: <20251009235755.4497-1-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DF:EE_|PH7PR12MB7306:EE_ X-MS-Office365-Filtering-Correlation-Id: c145763a-20b2-4e31-e984-08de078fb589 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|7416014|376014|13003099007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2025 23:58:13.9806 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c145763a-20b2-4e31-e984-08de078fb589 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DF.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7306 This series introduces support for AMD IOMMU nested page table translation with the host (v1) and guest (v2) page tables. In this mode, the AMD IOMMU driver configures the Device Table Entry (DTE) with host page table root pointer, which is configured by allocating domain with page table type IOMMU_HWPT_ALLOC_NEST_PARENT. The guest page tables and Guest CR3 (GCR3) tables are managed by Guest OS, and stored in the guest DTE (gDTE) in guest memory. VMM is responsible for passing gDTE information to the host IOMMU driver using struct iommu_hwpt_amd_guest when allocating a domain type IOMMU_DOMAIN_NESTED. Then, the gDTE is parsed and program onto host DTE by the AMD IOMMU driver. In addition, this series introduces base code for IOMMUFD vIOMMU for AMD IOMMU, and implements vIOMMU-based nested domain allocation interface. The struct nested_domain to store nested domain information, and set_dte_nested() helper function to handle DTE programing for the nested domain. The series is separated into two parts: * Patch 1-7 are preparatory patches. * Patch 8-15 implement nest-parent and nested domains support for IOMMUFD vIOMMU. Note: This series is rebased on top of: * [PATCH v5] iommu/amd: Add support for hw_info for iommu capability query https://lore.kernel.org/linux-iommu/20250926141901.511313-1-suravee.suthikulpanit@amd.com/T/#u Changes from V2: (https://lore.kernel.org/linux-iommu/20251001060954.5030-1-suravee.suthikulpanit@amd.com) * Patch 9 (new) * Patch 10: Update logic per Nicolin * Patch 11: - Do not change struct iommu_dev_data (remove parent, ndom) - Add comment on domain ID allocation - Move nested_domain_free() here * Patch 12, 13, 14 (new) * Patch 15: - Introduce struct amd_iommu_viommu to store struct iommufd_viommu, which is used to retrieve the parent domaina - Clean up the nested_attach_device() to use the new amd_iommu_set_dte_v1() instead of duplicating the logic. Thanks, Suravee Suravee Suthikulpanit (15): iommu/amd: Rename DEV_DOMID_MASK to DTE_DOMID_MASK iommu/amd: Make amd_iommu_pdom_id_alloc() non-static iommu/amd: Make amd_iommu_pdom_id_free() non-static iommu/amd: Make amd_iommu_device_flush_dte() non-static iommu/amd: Make amd_iommu_update_dte256() non-static iommu/amd: Make amd_iommu_make_clear_dte() non-static inline iommu/amd: Make amd_iommu_completion_wait() non-static iommufd: Introduce data struct for AMD nested domain allocation iommu/amd: Always enable GCR3TRPMode when supported. iommu/amd: Add support for nest parent domain allocation iommu/amd: Add support for nested domain allocation iommu/amd: Validate guest DTE for nested translation iommu/amd: Refactor persistent DTE bits programming into amd_iommu_make_clear_dte() iommu/amd: Refactor logic to program the host page table in DTE iommu/amd: Add support for nested domain attach/detach drivers/iommu/amd/Makefile | 2 +- drivers/iommu/amd/amd_iommu.h | 36 ++++++ drivers/iommu/amd/amd_iommu_types.h | 45 +++++-- drivers/iommu/amd/init.c | 3 + drivers/iommu/amd/iommu.c | 165 ++++++++++++------------ drivers/iommu/amd/nested.c | 191 ++++++++++++++++++++++++++++ include/uapi/linux/iommufd.h | 11 ++ 7 files changed, 361 insertions(+), 92 deletions(-) create mode 100644 drivers/iommu/amd/nested.c -- 2.34.1