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[2a00:1028:83b8:1e7a:3010:3bd6:8521:caf1]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47be27b0d5asm792930555e9.13.2026.01.02.00.15.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Jan 2026 00:15:01 -0800 (PST) Date: Fri, 2 Jan 2026 09:14:59 +0100 From: Petr Tesarik To: "Michael S. Tsirkin" Cc: linux-kernel@vger.kernel.org, Cong Wang , Jonathan Corbet , Olivia Mackall , Herbert Xu , Jason Wang , Paolo Bonzini , Stefan Hajnoczi , Eugenio =?UTF-8?B?UMOpcmV6?= , "James E.J. Bottomley" , "Martin K. Petersen" , Gerd Hoffmann , Xuan Zhuo , Marek Szyprowski , Robin Murphy , Stefano Garzarella , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Leon Romanovsky , Jason Gunthorpe , linux-doc@vger.kernel.org, linux-crypto@vger.kernel.org, virtualization@lists.linux.dev, linux-scsi@vger.kernel.org, iommu@lists.linux.dev, kvm@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH RFC 01/13] dma-mapping: add __dma_from_device_align_begin/end Message-ID: <20260102091459.6bec60c2@mordecai> In-Reply-To: <20251231154722-mutt-send-email-mst@kernel.org> References: <20251231150159.1779b585@mordecai> <20251231154722-mutt-send-email-mst@kernel.org> X-Mailer: Claws Mail 4.3.1 (GTK 3.24.51; x86_64-suse-linux-gnu) Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 31 Dec 2025 15:48:26 -0500 "Michael S. Tsirkin" wrote: > On Wed, Dec 31, 2025 at 03:01:59PM +0100, Petr Tesarik wrote: > > On Tue, 30 Dec 2025 05:15:46 -0500 > > "Michael S. Tsirkin" wrote: > > > > > When a structure contains a buffer that DMA writes to alongside fields > > > that the CPU writes to, cache line sharing between the DMA buffer and > > > CPU-written fields can cause data corruption on non-cache-coherent > > > platforms. > > > > > > Add __dma_from_device_aligned_begin/__dma_from_device_aligned_end > > > annotations to ensure proper alignment to prevent this: > > > > > > struct my_device { > > > spinlock_t lock1; > > > __dma_from_device_aligned_begin char dma_buffer1[16]; > > > char dma_buffer2[16]; > > > __dma_from_device_aligned_end spinlock_t lock2; > > > }; > > > > > > When the DMA buffer is the last field in the structure, just > > > __dma_from_device_aligned_begin is enough - the compiler's struct > > > padding protects the tail: > > > > > > struct my_device { > > > spinlock_t lock; > > > struct mutex mlock; > > > __dma_from_device_aligned_begin char dma_buffer1[16]; > > > char dma_buffer2[16]; > > > }; > > > > This works, but it's a bit hard to read. Can we reuse the > > __cacheline_group_{begin, end}() macros from ? > > Something like this: > > > > #define __dma_from_device_group_begin(GROUP) \ > > __cacheline_group_begin(GROUP) \ > > ____dma_from_device_aligned > > #define __dma_from_device_group_end(GROUP) \ > > __cacheline_group_end(GROUP) \ > > ____dma_from_device_aligned > > > > And used like this (the "rxbuf" group id was chosen arbitrarily): > > > > struct my_device { > > spinlock_t lock1; > > __dma_from_device_group_begin(rxbuf); > > char dma_buffer1[16]; > > char dma_buffer2[16]; > > __dma_from_device_group_end(rxbuf); > > spinlock_t lock2; > > }; > > > > Petr T > > Made this change, and pushed out to my tree. > > I'll post the new version in a couple of days, if no other issues > surface. FTR except my (non-critical) suggestions for PATCH 5/13, the updated series looks good to me. Thank you! Petr T