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[142.162.112.119]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-899c7376847sm55825926d6.28.2026.02.27.16.28.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Feb 2026 16:28:09 -0800 (PST) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1vw8Bk-00000001WwN-1wgX; Fri, 27 Feb 2026 20:28:08 -0400 Date: Fri, 27 Feb 2026 20:28:08 -0400 From: Jason Gunthorpe To: dan.j.williams@intel.com Cc: Robin Murphy , Alexey Kardashevskiy , x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-pci@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Sean Christopherson , Paolo Bonzini , Andy Lutomirski , Peter Zijlstra , Bjorn Helgaas , Marek Szyprowski , Andrew Morton , Catalin Marinas , Michael Ellerman , Mike Rapoport , Tom Lendacky , Ard Biesheuvel , Neeraj Upadhyay , Ashish Kalra , Stefano Garzarella , Melody Wang , Seongman Lee , Joerg Roedel , Nikunj A Dadhania , Michael Roth , Suravee Suthikulpanit , Andi Kleen , Kuppuswamy Sathyanarayanan , Tony Luck , David Woodhouse , Greg Kroah-Hartman , Denis Efremov , Geliang Tang , Piotr Gregor , "Michael S. Tsirkin" , Alex Williamson , Arnd Bergmann , Jesse Barnes , Jacob Pan , Yinghai Lu , Kevin Brodsky , Jonathan Cameron , "Aneesh Kumar K.V (Arm)" , Xu Yilun , Herbert Xu , Kim Phillips , Konrad Rzeszutek Wilk , Stefano Stabellini , Claire Chang , linux-coco@lists.linux.dev, iommu@lists.linux.dev Subject: Re: [PATCH kernel 4/9] dma/swiotlb: Stop forcing SWIOTLB for TDISP devices Message-ID: <20260228002808.GO44359@ziepe.ca> References: <20260225053806.3311234-1-aik@amd.com> <20260225053806.3311234-5-aik@amd.com> <699f238873ae7_1cc5100b6@dwillia2-mobl4.notmuch> <04b06a53-769c-44f1-a157-34591b9f8439@arm.com> <699f621daab02_2f4a1008f@dwillia2-mobl4.notmuch> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <699f621daab02_2f4a1008f@dwillia2-mobl4.notmuch> On Wed, Feb 25, 2026 at 12:57:01PM -0800, dan.j.williams@intel.com wrote: > > (since a device that's trusted to access private memory > > isn't necessarily prohibited from still also accessing shared memory as > > well), hmmm... > > The specification allows it, but Linux DMA mapping core is not yet ready > for it. So the expectation to start is that the device loses access to > its original shared IOMMU mappings when converted to private operation. Yes, the underlying translation changes, but no, it doesn't loose DMA access to any shared pages, it just goes through the T=1 IOMMU now. The T=1 IOMMU will still have them mapped on all three platforms AFAIK. On TDX/CCA the CPU and IOMMU S2 tables are identical, so of course the shared pages are mapped. On AMD there is only one IOMMU so the page must also be mapped or non-TDISP is broken. When this TDISP awareness is put in the DMA API it needs to be done in a way that allows DMA_ATTR_CC_DECRYPTED to keep working for TDISP devices. This is important because we are expecting these sorts of things to work as part of integrating non-TDISP RDMA devices into CC guests. We can't loose access to the shared pages that are shared with the non-TDISP devices... > So on ARM where shared addresses are high, it is future work to figure > out how an accepted device might also access shared mappings outside the > device's dma_mask. ARM has a "solution" right now. The location of the high bit is controlled by the VMM and the VMM cannot create a CC VM where the IPA space exceeds the dma_mask of any assigned device. Thus the VMM must limit the total available DRAM to fit within the HW restrictions. Hopefully TDX can do the same. Jason