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From: Jason Gunthorpe <jgg@nvidia.com>
To: Wei Wang <wei.w.wang@hotmail.com>
Cc: iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Will Deacon <will@kernel.org>,
	patches@lists.linux.dev
Subject: Re: [PATCH v2 1/5] iommu/amd: Simplify build_inv_address()
Date: Mon, 6 Apr 2026 22:26:33 -0300	[thread overview]
Message-ID: <20260407012633.GA3357077@nvidia.com> (raw)
In-Reply-To: <SI2PR01MB439366DBDB7EB03CC3729C03DC5AA@SI2PR01MB4393.apcprd01.prod.exchangelabs.com>

On Tue, Apr 07, 2026 at 09:15:40AM +0800, Wei Wang wrote:
> On 4/6/26 9:30 PM, Jason Gunthorpe wrote:
> > On Mon, Apr 06, 2026 at 09:18:19PM +0800, Wei Wang wrote:
> > 
> > > > -	msb_diff = fls64(end ^ address) - 1;
> > > > +	if (unlikely(sz_lg2 > 52))
> > > > +		return (CMD_INV_IOMMU_ALL_PAGES_ADDRESS & PAGE_MASK) |
> > > > +		       CMD_INV_IOMMU_PAGES_SIZE_MASK;
> > 
> > I was looking at Ankit's series and thinking this is slightly better as:
> > 
> > +	if (unlikely(sz_lg2 > min(52, BITS_PER_LONG - 1)))
> > 
> > So a ULONG_MAX gather will trigger full invalidation on 32 bit as
> > well, though it shouldn't be necessary it seems a tish cleaner and
> > matches how vt-d ended up
> > 
> 
> I see the value in matching how VT‑d handles this. I’m slightly concerned
> that adding the BITS_PER_LONG check might imply that AMD‑IOMMU supports
> 32‑bit kernels.
> 
> Unlike VT‑d, the AMD IOMMU driver doesn’t build on 32‑bit at all. From
> Kconfig:
> 
> config AMD_IOMMU
>         depends on X86_64 && PCI && ACPI && HAVE_CMPXCHG_DOUBLE
> 
> config INTEL_IOMMU
>         depends on PCI_MSI && ACPI && X86
> 
> Given that the 32‑bit case is unreachable for AMD‑IOMMU, keeping the
> existing check might actually be clearer?

Ah, I didn't remember that, it makes sense. Let's leave it then

Jason

  reply	other threads:[~2026-04-07  1:26 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-03 12:26 [PATCH v2 0/5] Improve the invalidation path in AMD Jason Gunthorpe
2026-04-03 12:26 ` [PATCH v2 1/5] iommu/amd: Simplify build_inv_address() Jason Gunthorpe
2026-04-06 13:18   ` Wei Wang
2026-04-06 13:30     ` Jason Gunthorpe
2026-04-07  1:15       ` Wei Wang
2026-04-07  1:26         ` Jason Gunthorpe [this message]
2026-04-03 12:26 ` [PATCH v2 2/5] iommu/amd: Pass last in through to build_inv_address() Jason Gunthorpe
2026-04-06 12:02   ` Wei Wang
2026-04-03 12:26 ` [PATCH v2 3/5] iommu/amd: Have amd_iommu_domain_flush_pages() use last Jason Gunthorpe
2026-04-03 12:26 ` [PATCH v2 4/5] iommu/amd: Make CMD_INV_IOMMU_ALL_PAGES_ADDRESS match the spec Jason Gunthorpe
2026-04-03 12:26 ` [PATCH v2 5/5] iommu/amd: Control INVALIDATE_IOMMU_PAGES PDE from the gather Jason Gunthorpe

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