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[47.54.130.67]) by smtp.gmail.com with ESMTPSA id af79cd13be357-910bc83bbf5sm13598685a.28.2026.05.13.10.24.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 May 2026 10:24:50 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1wNDKE-00000003dZu-0jxL; Wed, 13 May 2026 14:24:50 -0300 Date: Wed, 13 May 2026 14:24:50 -0300 From: Jason Gunthorpe To: Mostafa Saleh Cc: "Aneesh Kumar K.V (Arm)" , iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, Robin Murphy , Marek Szyprowski , Will Deacon , Marc Zyngier , Steven Price , Suzuki K Poulose , Catalin Marinas , Jiri Pirko , Petr Tesarik , Alexey Kardashevskiy , Dan Williams , Xu Yilun , linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Alexander Gordeev , Gerald Schaefer , Heiko Carstens , Vasily Gorbik , Christian Borntraeger , Sven Schnelle , x86@kernel.org Subject: Re: [PATCH v4 04/13] dma: swiotlb: track pool encryption state and honor DMA_ATTR_CC_SHARED Message-ID: <20260513172450.GR7702@ziepe.ca> References: <20260512090408.794195-1-aneesh.kumar@kernel.org> <20260512090408.794195-5-aneesh.kumar@kernel.org> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Wed, May 13, 2026 at 02:27:14PM +0000, Mostafa Saleh wrote: > > + /* > > + * if platform supports memory encryption, > > + * restricted mem pool is decrypted by default > > + */ > > + if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) { > > + mem->unencrypted = true; > > + set_memory_decrypted((unsigned long)phys_to_virt(rmem->base), > > + rmem->size >> PAGE_SHIFT); > > + } else { > > + mem->unencrypted = false; > > + } > > This breaks pKVM as it doesn’t set CC_ATTR_MEM_ENCRYPT, so all virtio > traffic now fails. How will pKVM signal what kind of memory the DMA needs then? Does it use set_memory_decrypted()? How can it use set_memory_decrypted() without offering CC_ATTR_MEM_ENCRYPT ? > Also, by design, some drivers are clueless about bouncing, so Oh? What does this mean? We take quite a dim view of drivers mis-using the DMA API.. > I believe that the pool should have a way to control it’s property > (encrypted or decrypted) and that takes priority over whatever > attributes comes from allocation. We should get here because dma_capable() fails, and then swiotlb needs to return something that makes dma_capable() succeed. Yes, it should return details about the thing it decided, but it shouldn't have been pre-created with some idea how to make dma_capable() work. If dma_capable() can fail, then swiotlb should know exactly what to do to fix it. If pkvm wants to use the hacky scheme where you force a swiotlb pool configuration during arch init with force swiotlb that's a somewhat different flow and, sure the forced pool should force do whatever it is forced to. But lets try to keep them seperated in the discussion.. > And that brings us to the same point whether it’s better to return > the memory along with it’s state or we pass the requested state. > I think for other cases it’s fine for the device/DMA-API to dictate > the attrs, but not in restricted-dma case, the firmware just knows better. The memory type must be returned back at some level so downstream things can do the right transformation of the phys_addr_t. One of the aspirational CC things that should work is a T=1 device tries to DMA from a decrypted page, finds the address is above the dma limit of the device, so it bounces it with SWIOTLB to an encrypted low address page and then the DMA API internal flow switiches from working with decrypted to encrypted phys_addr_t. If we can make that work then maybe the flows are designed correctly. Jason