From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: "Pranjal Shrivastava" <praan@google.com>,
"Guanghui Feng" <guanghuifeng@linux.alibaba.com>,
"Michał Grzelak" <michal.grzelak@intel.com>,
"Michael Bommarito" <michael.bommarito@gmail.com>,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: [PATCH 2/6] iommu/vt-d: Clear Present bit before tearing down scalable-mode context entry
Date: Wed, 3 Jun 2026 07:34:21 +0800 [thread overview]
Message-ID: <20260602233426.357499-3-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20260602233426.357499-1-baolu.lu@linux.intel.com>
From: Michael Bommarito <michael.bommarito@gmail.com>
device_pasid_table_teardown() zeroes the 128-bit scalable-mode context
entry with context_clear_entry() while the Present bit is still set. This
creates a window where the hardware can fetch a torn entry, with some
fields already zeroed while Present is still set, leading to unpredictable
behavior or spurious faults. The context-cache invalidation is issued only
after the entry has been zeroed, and intel_pasid_free_table() then frees
the PASID directory pages, so the IOMMU can keep walking a stale Present=1
entry that points at freed memory.
While x86 provides strong write ordering, the compiler may reorder the two
64-bit writes to the entry, and the hardware fetch is not guaranteed to be
atomic with respect to multiple CPU writes.
Commit c1e4f1dccbe9d ("iommu/vt-d: Clear Present bit before tearing down
context entry") fixed this exact pattern in domain_context_clear_one() and
the copied-context path, but device_pasid_table_teardown() was not
converted.
Align it with the "Guidance to Software for Invalidations" in the VT-d
spec, Section 6.5.3.3, using the same ownership handshake as the sibling
fix: clear only the Present bit, flush it to the IOMMU, perform the
context-cache invalidation, and only then zero the rest of the entry.
Fixes: 81e921fd32161 ("iommu/vt-d: Fix NULL domain on device release")
Signed-off-by: Michael Bommarito <michael.bommarito@gmail.com>
Assisted-by: Claude:claude-opus-4-7
Link: https://lore.kernel.org/r/20260528025557.3209367-1-michael.bommarito@gmail.com
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
drivers/iommu/intel/pasid.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index 89541b74ab8c..40910dc7363b 100644
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -748,10 +748,12 @@ static void device_pasid_table_teardown(struct device *dev, u8 bus, u8 devfn)
}
did = context_domain_id(context);
- context_clear_entry(context);
+ context_clear_present(context);
__iommu_flush_cache(iommu, context, sizeof(*context));
spin_unlock(&iommu->lock);
intel_context_flush_no_pasid(info, context, did);
+ context_clear_entry(context);
+ __iommu_flush_cache(iommu, context, sizeof(*context));
}
static int pci_pasid_table_teardown(struct pci_dev *pdev, u16 alias, void *data)
--
2.43.0
next prev parent reply other threads:[~2026-06-02 23:36 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-02 23:34 [PATCH 0/6] [PULL REQUEST] Intel IOMMU updates for v7.2 Lu Baolu
2026-06-02 23:34 ` [PATCH 1/6] iommu/vt-d: Avoid WARNING in sva unbind path Lu Baolu
2026-06-02 23:34 ` Lu Baolu [this message]
2026-06-02 23:34 ` [PATCH 3/6] iommu/vt-d: Remove typo from pasid_pte_config_nested() Lu Baolu
2026-06-02 23:34 ` [PATCH 4/6] iommu/vt-d: Improve IOMMU fault information Lu Baolu
2026-06-02 23:34 ` [PATCH 5/6] iommu/vt-d: Fix RB-tree corruption in probe error path Lu Baolu
2026-06-02 23:34 ` [PATCH 6/6] iommu/vt-d: Fix Use-After-Free " Lu Baolu
2026-06-04 3:44 ` [PATCH 0/6] [PULL REQUEST] Intel IOMMU updates for v7.2 Baolu Lu
2026-06-04 5:27 ` Pranjal Shrivastava
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