From mboxrd@z Thu Jan  1 00:00:00 1970
From: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Subject: Re: [PATCH v6 6/8] dma-mapping: detect and configure IOMMU in
	of_dma_configure
Date: Wed, 07 Jan 2015 20:29:15 +0100
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Cc: Joerg Roedel <jroedel-l3A5Bk7waGM@public.gmane.org>, "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" <iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>, Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>, Laurent Pinchart <laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>, Varun Sethi <Varun.Sethi-KZfg59tc24xl57MIdRCFDg@public.gmane.org>, David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>, "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
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On Wednesday 07 January 2015 18:57:05 Will Deacon wrote:
> 
> Sorry for the delay on this, I had to do a bit of digging.
> 
> On Mon, Dec 22, 2014 at 01:36:01PM +0000, Arnd Bergmann wrote:
> > Do you think it's possible that we might have to deal with a single PCI host
> > that is connected two different SMMU instances for the purposes of extending
> > the StreamID space from 15 to 16 bits? I think we would have trouble
> > expressing this with the current syntax.
> 
> Unfortunately, this sounds like something we may well have to support.
> Whilst the SMMUv2 architecture did grow a late extension to support 16-bit
> StreamIDs, that may have been too late for all silicon vendors and, as such,
> I'm not confident that such systems will present a single software interface
> for their SMMU.

So it's technically possible to connect two SMMU instances to a single
PCIe root complex? I knew that there is at least one vendor (AMD) that
can only do 128 bus numbers on PCIe, which seems a much simpler workaround.

	Arnd