From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, yi.l.liu@intel.com, kevin.tian@intel.com,
nicolinc@nvidia.com, vasant.hegde@amd.com, jon.grimm@amd.com,
santosh.shukla@amd.com, jay.chen@amd.com, wvw@google.com,
wnliu@google.com, dantuluris@google.com, chriscli@google.com,
kpsingh@google.com
Subject: Re: [PATCH v3 09/22] iommu/amd: Introduce and map vIOMMU private IPA region
Date: Mon, 27 Jul 2026 20:21:51 +0700 [thread overview]
Message-ID: <322afd04-fca6-4e4a-aa7d-7ea20a50001e@amd.com> (raw)
In-Reply-To: <20260707140734.GA220801@nvidia.com>
On 7/7/2026 9:07 PM, Jason Gunthorpe wrote:
> On Mon, Jun 29, 2026 at 03:35:22PM +0000, Suravee Suthikulpanit wrote:
>> @@ -1808,6 +1808,22 @@ static int domain_flush_pages_v1(struct protection_domain *pdom,
>> return ret;
>> }
>>
>> +int amd_iommu_flush_private_vm_region(struct amd_iommu *iommu, struct protection_domain *pdom,
>> + u64 address, size_t size)
>> +{
>> + int ret;
>> + struct iommu_cmd cmd;
>
> Why do we need this function? iommu_unmap() should generate this
> flush automatically, shouldn't it?
The domain_flush_pages_v1() only queues invalidation commands to IOMMUs
recorded in pdom->iommu_array. iommu_array is populated only when a
device is attached via attach_device() → pdom_attach_iommu(). The
viommu_pdom is not attached that way; it is wired through the IOMMU’s
own DTE in set_dte_ipa().
However, I am making change to the code so that we would not need this.
>> +/*
>> + * Allocate backing pages, mark UC, and map at @iova in viommu_pdom.
>> + * *@out_va is NULL on any failure.
>> + */
>> +static int viommu_priv_alloc_map_flush(struct amd_iommu *iommu, u64 iova, size_t size,
>> + gfp_t gfp, void **out_va)
>> +{
>
> I think the flush is a bit unnecessary in the name
Sure. I'll fix this.
>
>> + int ret;
>> + void *va;
>> + int nid = iommu && iommu->dev ? dev_to_node(&iommu->dev->dev) : NUMA_NO_NODE;
>> +
>> + *out_va = NULL;
>> +
>> + if (!iommu || !iommu->viommu_pdom)
>> + return -EINVAL;
>> +
>> + va = iommu_alloc_pages_node_sz(nid, gfp, size);
>> + if (!va)
>> + return -ENOMEM;
>> +
>> + /*
>> + * IOMMU spec mentions that the vIOMMU backing storage memory
>> + * should be marked as UC.
>> + */
>> + ret = set_memory_uc((unsigned long)va, size >> PAGE_SHIFT);
>> + if (ret)
>> + goto err_free_pages;
>> +
>> + ret = iommu_map(&iommu->viommu_pdom->domain, iova, iommu_virt_to_phys(va), size,
>> + IOMMU_PROT_IR | IOMMU_PROT_IW, GFP_KERNEL);
> ^^^^^^^^^^^^^^^^^^^^^^^
>
> These are the wrong constants to pass to iommu_prot
I'll fix this.
>> +/*
>> + * Unmap @iova, flush the unmapped span on this IOMMU, WB, and free @cpu_va.
>> + * Returns 0, or the flush error if amd_iommu_flush_private_vm_region() fails.
>> + */
>> +static int viommu_priv_unmap_flush_free(struct amd_iommu *iommu, u64 iova, size_t size,
>> + void *cpu_va)
>> +{
>> + size_t unmapped;
>> + int ret = 0;
>> +
>> + if (!cpu_va)
>> + return 0;
>> + if (!iommu || !iommu->viommu_pdom)
>> + return -EINVAL;
>> +
>> + unmapped = iommu_unmap(&iommu->viommu_pdom->domain, iova, size);
>> + if (unmapped != size)
>> + pr_warn("%s: unmapped %#zx of %#lx at %#llx\n", __func__, unmapped, size, iova);
>> +
>> + if (unmapped) {
>> + ret = amd_iommu_flush_private_vm_region(iommu, iommu->viommu_pdom, iova,
>> + unmapped);
>
> unmap calls flush through the domain, why do we need another flush?
>
> Jason
I am updating and sending out V4.
Thanks,
Suravee
next prev parent reply other threads:[~2026-07-27 13:22 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-29 15:35 [PATCH v3 00/22] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 01/22] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 02/22] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 03/22] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 04/22] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 05/22] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 06/22] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 07/22] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-07-07 14:33 ` Jason Gunthorpe
2026-07-15 11:00 ` Suthikulpanit, Suravee
2026-06-29 15:35 ` [PATCH v3 08/22] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 09/22] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-07-07 14:07 ` Jason Gunthorpe
2026-07-27 13:21 ` Suthikulpanit, Suravee [this message]
2026-06-29 15:35 ` [PATCH v3 10/22] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-07-07 14:18 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 11/22] iommu/amd: Export amd_iommu_alloc_dev_data() helper Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 12/22] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-07-07 14:20 ` Jason Gunthorpe
2026-06-29 15:35 ` [PATCH v3 13/22] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 14/22] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 15/22] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 16/22] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-07-07 14:31 ` Jason Gunthorpe
2026-07-15 7:56 ` Suthikulpanit, Suravee
2026-06-29 15:35 ` [PATCH v3 17/22] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-07-07 14:32 ` Jason Gunthorpe
2026-07-15 9:46 ` Suthikulpanit, Suravee
2026-06-29 15:35 ` [PATCH v3 18/22] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-06-29 15:35 ` [PATCH v3 19/22] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-07-07 14:36 ` Jason Gunthorpe
2026-07-27 10:38 ` Suthikulpanit, Suravee
2026-06-29 15:35 ` [PATCH v3 20/22] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-07-07 14:39 ` Jason Gunthorpe
2026-07-21 9:39 ` Suthikulpanit, Suravee
2026-06-29 15:35 ` [PATCH v3 21/22] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-07-07 14:43 ` Jason Gunthorpe
2026-07-21 9:40 ` Suthikulpanit, Suravee
2026-06-29 15:35 ` [PATCH v3 22/22] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-07-07 14:45 ` [PATCH v3 00/22] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Jason Gunthorpe
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