From: Auger Eric <eric.auger@redhat.com>
To: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
eric.auger.pro@gmail.com, joro@8bytes.org,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
dwmw2@infradead.org, lorenzo.pieralisi@arm.com,
robin.murphy@arm.com, will.deacon@arm.com, hanjun.guo@linaro.org,
sudeep.holla@arm.com
Cc: alex.williamson@redhat.com
Subject: Re: [PATCH v3 6/7] iommu: Introduce IOMMU_RESV_DIRECT_RELAXABLE reserved memory regions
Date: Thu, 16 May 2019 14:58:08 +0200 [thread overview]
Message-ID: <342a4aad-3abd-f9a8-05fd-e8e260bbb69d@redhat.com> (raw)
In-Reply-To: <214a20d2-9cb5-c23d-ad38-8a0dea729e00@arm.com>
Hi Jean-Philippe,
On 5/16/19 2:43 PM, Jean-Philippe Brucker wrote:
> On 16/05/2019 12:45, Auger Eric wrote:
>> Hi Jean-Philippe,
>>
>> On 5/16/19 1:16 PM, Jean-Philippe Brucker wrote:
>>> On 16/05/2019 11:08, Eric Auger wrote:
>>>> Note: At the moment the sysfs ABI is not changed. However I wonder
>>>> whether it wouldn't be preferable to report the direct region as
>>>> "direct_relaxed" there. At the moment, in case the same direct
>>>> region is used by 2 devices, one USB/GFX and another not belonging
>>>> to the previous categories, the direct region will be output twice
>>>> with "direct" type.
>>>>
>>>> This would unblock Shameer's series:
>>>> [PATCH v6 0/7] vfio/type1: Add support for valid iova list management
>>>> https://patchwork.kernel.org/patch/10425309/
>>>
>>> Thanks for doing this!
>>>
>>>> which failed to get pulled for 4.18 merge window due to IGD
>>>> device assignment regression.
>>>>
>>>> v2 -> v3:
>>>> - fix direct type check
>>>> ---
>>>> drivers/iommu/iommu.c | 12 +++++++-----
>>>> include/linux/iommu.h | 6 ++++++
>>>> 2 files changed, 13 insertions(+), 5 deletions(-)
>>>>
>>>> diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
>>>> index ae4ea5c0e6f9..28c3d6351832 100644
>>>> --- a/drivers/iommu/iommu.c
>>>> +++ b/drivers/iommu/iommu.c
>>>> @@ -73,10 +73,11 @@ struct iommu_group_attribute {
>>>> };
>>>>
>>>> static const char * const iommu_group_resv_type_string[] = {
>>>> - [IOMMU_RESV_DIRECT] = "direct",
>>>> - [IOMMU_RESV_RESERVED] = "reserved",
>>>> - [IOMMU_RESV_MSI] = "msi",
>>>> - [IOMMU_RESV_SW_MSI] = "msi",
>>>> + [IOMMU_RESV_DIRECT] = "direct",
>>>> + [IOMMU_RESV_DIRECT_RELAXABLE] = "direct",
>>>> + [IOMMU_RESV_RESERVED] = "reserved",
>>>> + [IOMMU_RESV_MSI] = "msi",
>>>> + [IOMMU_RESV_SW_MSI] = "msi",
>>>> };
>>>>
>>>> #define IOMMU_GROUP_ATTR(_name, _mode, _show, _store) \
>>>> @@ -573,7 +574,8 @@ static int iommu_group_create_direct_mappings(struct iommu_group *group,
>>>> start = ALIGN(entry->start, pg_size);
>>>> end = ALIGN(entry->start + entry->length, pg_size);
>>>>
>>>> - if (entry->type != IOMMU_RESV_DIRECT)
>>>> + if (entry->type != IOMMU_RESV_DIRECT &&
>>>> + entry->type != IOMMU_RESV_DIRECT_RELAXABLE)
>>>
>>> I'm trying to understand why you need to create direct mappings at all
>>> for these relaxable regions. In the host the region is needed for legacy
>>> device features, which are disabled (and cannot be re-enabled) when
>>> assigning the device to a guest?
>> This follows Kevin's comment in the thread below:
>> https://patchwork.kernel.org/patch/10449103/#21957279
>>
>> In normal DMA API host path, those regions need to be 1-1 mapped. They
>> are likely to be accessed by the driver or FW at early boot phase or
>> even during execution, depending on features being used.
>>
>> That's the reason, according to Kevin we couldn't hide them.
>>
>> We just know that, in general, they are not used anymore when assigning
>> the device or if accesses are attempted this generally does not block
>> the assignment use case. For example, it is said in
>> https://github.com/qemu/qemu/blob/master/docs/igd-assign.txt that in
>> legacy IGD assignment use case, there may be "a small numbers of DMAR
>> faults when initially assigned".
>
> Hmm, fair enough. That doesn't sound too good, if the device might
> perform arbitrary writes into guest memory once new IOMMU mappings are
> in place. I was wondering if we could report some IOVA ranges as
> "available but avoid if possible".
In Shameer's series we currently reject any vfio dma_map that would fall
into an RMRR (hence the regression on existing USB/GFX use case). With
the relaxable RMRR info we could imagine to let the userspace choose
whether we want to proceed with the dma_map despite the risk or
introduce a vfio_iommu_type1 module option (turned off by default for
not regressing existing USB/GFX passthrough) that would forbid dma_map
on relaxable RMRR regions.
Thanks
Eric
If the guest has a vIOMMU, they are
> easy to avoid. But I doubt they would ever get used, since probably no
> one is going to instantiate a vIOMMU for a graphics device in legacy mode.
>
> Thanks,
> Jean
>
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next prev parent reply other threads:[~2019-05-16 12:58 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-16 10:08 [PATCH v3 0/7] RMRR related fixes and enhancements Eric Auger
2019-05-16 10:08 ` [PATCH v3 1/7] iommu: Pass a GFP flag parameter to iommu_alloc_resv_region() Eric Auger
2019-05-16 10:08 ` [PATCH v3 2/7] iommu/vt-d: Duplicate iommu_resv_region objects per device list Eric Auger
2019-05-16 10:08 ` [PATCH v3 3/7] iommu/vt-d: Introduce is_downstream_to_pci_bridge helper Eric Auger
2019-05-16 10:08 ` [PATCH v3 4/7] iommu/vt-d: Handle RMRR with PCI bridge device scopes Eric Auger
2019-05-16 10:08 ` [PATCH v3 5/7] iommu/vt-d: Handle PCI bridge RMRR device scopes in intel_iommu_get_resv_regions Eric Auger
2019-05-16 10:08 ` [PATCH v3 6/7] iommu: Introduce IOMMU_RESV_DIRECT_RELAXABLE reserved memory regions Eric Auger
2019-05-16 11:16 ` Jean-Philippe Brucker
2019-05-16 11:45 ` Auger Eric
2019-05-16 12:43 ` Jean-Philippe Brucker
2019-05-16 12:58 ` Auger Eric [this message]
2019-05-16 17:06 ` Alex Williamson
2019-05-16 17:23 ` Robin Murphy
2019-05-16 12:46 ` Robin Murphy
2019-05-16 13:23 ` Auger Eric
2019-05-16 16:53 ` Alex Williamson
2019-05-16 17:53 ` Robin Murphy
2019-05-17 7:11 ` Auger Eric
2019-05-20 12:45 ` Auger Eric
2019-05-16 10:08 ` [PATCH v3 7/7] iommu/vt-d: Differentiate relaxable and non relaxable RMRRs Eric Auger
2019-05-17 4:46 ` Lu Baolu
2019-05-17 7:07 ` Auger Eric
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