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From: Lu Baolu <baolu.lu@linux.intel.com>
To: Barret Rhoden <brho@google.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	David Woodhouse <dwmw2@infradead.org>,
	Joerg Roedel <joro@8bytes.org>, Yian Chen <yian.chen@intel.com>,
	Sohil Mehta <sohil.mehta@intel.com>
Cc: iommu@lists.linux-foundation.org, x86@kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/3] iommu/vt-d bad RMRR workarounds
Date: Thu, 12 Dec 2019 10:43:45 +0800	[thread overview]
Message-ID: <35f49464-0ce5-9998-12a0-624d9683ea18@linux.intel.com> (raw)
In-Reply-To: <20191211194606.87940-1-brho@google.com>

Hi,

On 12/12/19 3:46 AM, Barret Rhoden via iommu wrote:
> I can imagine a bunch of ways around this.
> 
> One option is to hook in a check for buggy RMRRs in intel-iommu.c.  If
> the base and end are 0, just ignore the entry.  That works for my
> specific buggy DMAR entry.  There might be other buggy entries out
> there.  The docs specify some requirements on the base and end (called
> limit) addresses.
> 
> Another option is to change the sanity check so that unmapped ranges are
> considered OK.  That would work for my case, but only because we're
> hiding the firmware bug: my DMAR has a bad RMRR that happens to fall into a
> reserved or non-existent range.  The downside here is that we'd
> presumably be setting up an IOMMU mapping for this bad RMRR.  But at
> least it's not pointing to any RAM we're using.  (That's actually what
> goes on in the current, non-kexec case for me.  Phys page 0 is marked
> RESERVED, and I have an RMRR that points to it.)  This option also would
> cover any buggy firmwares that use an actual RMRR that pointed to memory
> that was omitted from the e820 map.
> 
> A third option: whenever the RMRR sanity check fails, just ignore it and
> return 0.  Don't set up the rmrru.  Right now, we completely abort DMAR
> processing.  If there was an actual device that needed to poke this
> memory that failed the sanity check (meaning, not RESERVED, currently),
> then we're already in trouble; that device could clobber RAM, right?  If
> we're going to use the IOMMU, I'd rather the device be behind an IOMMU
> with*no*  mapping for the region, so it couldn't clobber whatever we
> happened to put in that location.
> 
> I actually think all three options are reasonable ideas independently of
> one another.  This patchset that does all three.  Please take at least
> one of them.  =)  (May require a slight revision if you don't take all
> of them).

The VT-d spec defines the BIOS considerations about RMRR in section 8.4:

"
BIOS must report the RMRR reported memory addresses as reserved (or as
EFI runtime) in the system memory map returned through methods such as
INT15, EFI GetMemoryMap etc.
"

So we should treat it as firmware bug if the RMRR range is not mapped as
RESERVED in the system memory map table.

As for how should the driver handle this case, ignoring buggy RMRR with
a warning message might be a possible choice.

Best regards,
baolu
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  parent reply	other threads:[~2019-12-12  2:44 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-11 19:46 [PATCH 0/3] iommu/vt-d bad RMRR workarounds Barret Rhoden via iommu
2019-12-11 19:46 ` [PATCH 1/3] iommu/vt-d: skip RMRR entries that fail the sanity check Barret Rhoden via iommu
2019-12-16 19:07   ` Chen, Yian
2019-12-16 19:35     ` Barret Rhoden via iommu
2019-12-17 19:19       ` Chen, Yian
2019-12-23 20:27         ` Barret Rhoden via iommu
2019-12-11 19:46 ` [PATCH 2/3] iommu/vt-d: treat unmapped RMRR entries as sane Barret Rhoden via iommu
2019-12-11 19:46 ` [PATCH 3/3] iommu/vt-d: skip invalid RMRR entries Barret Rhoden via iommu
2019-12-12  2:43 ` Lu Baolu [this message]
2019-12-13 14:31   ` [PATCH 0/3] iommu/vt-d bad RMRR workarounds Barret Rhoden via iommu
2019-12-14  1:52     ` Lu Baolu
2019-12-16 19:11       ` Chen, Yian

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