Re: [PATCH] iommu/vt-d: Fix PASID directory pointer coherency

[Baolu Lu <baolu.lu@linux.intel.com>]

On 2023/2/7 1:25, Jacob Pan wrote:
>>> ---
>>>    drivers/iommu/intel/iommu.c | 6 ++++++
>>>    1 file changed, 6 insertions(+)
>>>
>>> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
>>> index 59df7e42fd53..b4878c7ac008 100644
>>> --- a/drivers/iommu/intel/iommu.c
>>> +++ b/drivers/iommu/intel/iommu.c
>>> @@ -1976,6 +1976,12 @@ static int domain_context_mapping_one(struct
>>> dmar_domain *domain, pds = context_get_sm_pds(table);
>>>    		context->lo = (u64)virt_to_phys(table->table) |
>>>    				context_pdts(pds);
>>> +		/*
>>> +		 * Scalable-mode PASID directory pointer is not
>>> snooped if the
>>> +		 * coherent bit is not set.
>>> +		 */
>>> +		if (!ecap_coherent(iommu->ecap))
>>> +			clflush_cache_range(table->table, sizeof(void
>>> *));
>> This isn't comprehensive. The clflush should be called whenever the
>> pasid directory table is allocated or updated.
>>
> allocate a pasid table does not mean it gets used by iommu hw, not until it
> is programmed into context entry.

Hi Jacob,

This page is used by the device, and the device's access to this memory
is not coherent. So after the page is allocated, any changes made by the
CPU to this page must be written back to the real memory.

This patch only flushes the first 8 bytes of the table. That's not
enough.

Be aware that page allocation also requires a clflush, because at least
__GFP_ ZERO implies modification to page.

Best regards,
baolu