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From: Robin Murphy <robin.murphy@arm.com>
To: Will Deacon <will@kernel.org>,
	Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: devicetree@vger.kernel.org, "Jason Cooper" <jason@lakedaemon.net>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Antoine Tenart" <antoine.tenart@bootlin.com>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Hanna Hawa" <hannah@marvell.com>,
	"Will Deacon" <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org,
	"Maxime Chevallier" <maxime.chevallier@bootlin.com>,
	"Nadav Haklai" <nadavh@marvell.com>,
	iommu@lists.linux-foundation.org,
	"Rob Herring" <robh+dt@kernel.org>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	linux-arm-kernel@lists.infradead.org,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH v2 1/4] iommu/arm-smmu: Introduce wrapper for writeq/readq
Date: Thu, 22 Aug 2019 15:30:24 +0100	[thread overview]
Message-ID: <4ef6512d-701f-4fe8-8173-5f659dab0d32@arm.com> (raw)
In-Reply-To: <20190820120848.2m6gytilrpil4stu@willie-the-truck>

On 20/08/2019 13:08, Will Deacon wrote:
> Hi Gregory, Hanna,
> 
> On Thu, Jul 11, 2019 at 05:02:39PM +0200, Gregory CLEMENT wrote:
>> From: Hanna Hawa <hannah@marvell.com>
>>
>> This patch introduces the smmu_writeq_relaxed/smmu_readq_relaxed
>> helpers, as preparation to add specific Marvell work-around for
>> accessing 64 bits width registers of ARM SMMU.
>>
>> Signed-off-by: Hanna Hawa <hannah@marvell.com>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
>> ---
>>   drivers/iommu/arm-smmu.c | 36 +++++++++++++++++++++++++++---------
>>   1 file changed, 27 insertions(+), 9 deletions(-)
> 
> Sorry for the delay in replying to this -- Robin's been reworking the driver
> so that implementation quirks can be specified more cleanly. Please can you
> take a look at:
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-joerg/arm-smmu/refactoring
> 
> and try to respin your patches on top of that?

Right, the arm_smmu_impl design was specifically anticipating this quirk 
as well - it should just be a case of a cfg_probe hook to hide the 
features which can't work, plus {read,write}_reg64 hooks to override any 
remaining 64-bit accesses with the explicit hi_lo_* variants, munged 
together (either statically or dynamically) with the standard MMU-500 hooks.

Robin.
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  reply	other threads:[~2019-08-22 14:30 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-11 15:02 [PATCH v2 0/4] Add system mmu support for Armada-806 Gregory CLEMENT
2019-07-11 15:02 ` [PATCH v2 1/4] iommu/arm-smmu: Introduce wrapper for writeq/readq Gregory CLEMENT
2019-08-20 12:08   ` Will Deacon
2019-08-22 14:30     ` Robin Murphy [this message]
2019-07-11 15:02 ` [PATCH v2 2/4] iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743 Gregory CLEMENT
2019-07-11 15:02 ` [PATCH v2 3/4] dt-bindings: iommu/arm, smmu: add compatible string for Marvell Gregory CLEMENT
2019-07-24 20:36   ` [PATCH v2 3/4] dt-bindings: iommu/arm,smmu: " Rob Herring
2019-08-22 14:16   ` [PATCH v2 3/4] dt-bindings: iommu/arm, smmu: " Robin Murphy
2019-07-11 15:02 ` [PATCH v2 4/4] arm64: dts: marvell: armada-ap806: add smmu support Gregory CLEMENT

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