From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulanit Subject: Re: [PATCH] iommu/amd: Fix logics to determine and checking max PASID Date: Wed, 5 Mar 2014 16:46:58 -0600 Message-ID: <5317A962.10004@amd.com> References: <1394046068-3858-1-git-send-email-suravee.suthikulpanit@amd.com> <20140305223544.GA2813@8bytes.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20140305223544.GA2813-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Joerg Roedel Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, jay.cornwall-5C7GfCeVMHo@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, kim.naru-5C7GfCeVMHo@public.gmane.org List-Id: iommu@lists.linux-foundation.org Joerg, Other commands can still support upto 20-bit PASID. As I mentioned, there is still no system with more than 16-bit PASID. Either way, I have also replaced the PASID_MASK with the value derived from MMIOx30h[PASmax] of the IOMMU Extended Feature register instead. This should allow us not to have to change the mask things again for future hardware. We just need to revisit this BUG_ON() part when the new spec comes. Suravee On 3/5/2014 4:35 PM, Joerg Roedel wrote: > On Wed, Mar 05, 2014 at 01:01:08PM -0600, suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org wrote: >> drivers/iommu/amd_iommu.c | 26 +++++++++++++++++++++++--- >> drivers/iommu/amd_iommu_init.c | 15 ++++++++------- >> drivers/iommu/amd_iommu_types.h | 6 ++---- >> drivers/iommu/amd_iommu_v2.c | 2 +- >> 4 files changed, 34 insertions(+), 15 deletions(-) > > Hmm, this looks a bit complicated. Since the inv_iotlb_pasid and > complete_ppr command only support 16 bit pasids by specification, there > is no way to support pasids with more than 16 bits in general anymore. I > think the best way to handle it is to just change the PASID_MASK to > 0x0000ffff. > >> static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, int pasid, >> int qdep, u64 address, bool size) >> { >> + /* Note: >> + * This command supports only 16-bit PASID. >> + * Currently, hardware only implement upto 16-bit PASID >> + * even though the spec says it could have upto 20 bits. >> + * This is likely to be updated in the future revision of >> + * IOMMU specs when the hardware with PASID > 16 bits >> + * become available. >> + */ >> + BUG_ON(pasid > 0xFFFF); > > We can keep this as BUG_ON(pasid & ~PASID_MASK), but then ... > >> - cmd->data[1] = pasid & PASID_MASK; >> + cmd->data[1] = pasid & amd_iommu_max_pasid; > > ... masking out the other bits is redundant. > > > Joerg > > >